Forming method of metal oxide semiconductor device grids structure

Abstract

The invention provides a grid structure forming method for semiconductor device of metal oxide, which comprises forming dielectric layer on the semiconductor underlay; forming polycrystalline silicon layer on the said dielectric layer; forming stack layer and positioning the grid location on the said polycrystalline silicon layer; etching the said polycrystalline silicon layer for the mask layer by the said stack layer to form grid; The invention can produce grid with good shape without forming the hard mask layer, which is especially applicable to grid making with characteristic dimension of line width under 65nm.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a gate structure of a metal oxide semiconductor device. Background technique [0002] Polysilicon is the preferred material for manufacturing gates, which has special heat resistance and high etching pattern accuracy. The manufacturing method of the gate first needs to form a layer of gate silicon oxide on the semiconductor substrate, then deposit a polysilicon layer on the gate oxide layer, and then coat a fluid bottom anti-reflection layer (BARC) and photoresist. After patterning the photoresist layer, etching the polysilicon layer to form a gate. 1 to 4 are schematic cross-sectional views illustrating a conventional gate manufacturing method. As shown in FIG. 1 , a gate oxide layer 110 is grown on a substrate 100 , a polysilicon layer 120 is deposited on the gate oxide layer 110 , and then the polysilicon layer is etched to form a gat...

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Problems solved by technology

Although this method can obtain a gate with a better profile, the carbon-containing adhesion layer 130 is likely to pollute the substrate surface during the etching process and form dielectric layer defects; meanwhile, due to the texture of the silicon nitride or silicon oxynitride layer 131 Harder, resulting in increased etching difficulty, longer etching time, and reduced production efficiency

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