96results about How to "Simplify the etch process" patented technology

A fabricating method for patterned sapphire substrate is provided. The fabricating method includes the following processes. First, a sapphire substrate is provided, and a mask layer is formed on the sapphire substrate, wherein the mask layer with appropriate pattern exposes a part of the sapphire substrate. Then, a wet etching process is performed to remove the exposed part of the sapphire substrate, wherein an etchant in the wet etching process includes sulfuric acid and the mixture of the sulfuric acid and the phosphoric acid. Next, the mask layer is removed to form the patterned sapphire substrate. Further, a fabricating method for light-emitting diode is provided.

The invention provides a wafer level package structure and a formation method thereof. The method comprises the following steps: providing a substrate; forming a cavity in the substrate; forming a redistribution line in the substrate and on part surface of the cavity; providing a chip to be packaged, wherein the chip has a device surface and a basal surface opposite to the device surface; formingan Under Bump Metal on a soldering pad layer surface of the device surface and forming a bump on a surface of the Under Bump Metal; connecting the chip to be packaged with the substrate such that thechip to be packaged faces the cavity and the bump is electrically connected with the redistribution line. The wafer level package structure in the invention has the advantages of a simple structure, high packaging quality, and high compatibility in subsequent combination with PCB plate process. The wafer level package structure formation method in the invention has the advantages of simple process sequence and low cost.

An etching process using germanium hard mask (25) includes forming a dielectric layer (15) over a major surface (11) of a semiconductor substrate (10) and depositing a metallic germanium layer (22) over the dielectric layer (15). The metallic germanium layer (22) is patterned through a photo resist (24) to form the germanium hard mask (25). The dielectric layer (15) is selectively etched through the germanium hard mask (25) to form a dielectric hard mask (35), through which the semiconductor substrate (10) is subsequently etched. After forming the dielectric hard mask (35), the germanium hard mask (25) is stripped away by oxidizing the metallic germanium hard mask (25) to transform it into a layer (27) of germanium oxide and rinsing the semiconductor substrate (10) in water to remove the germanium oxide layer (27). Preferably, the germanium hard mask (25) is removed before etching the semiconductor substrate (10).

A liquid droplet ejecting head includes a fluid path forming substrate having a fluid path communicating with nozzle holes and a diaphragm on the fluid path forming substrate. The diaphragm has a first surface facing a second surface. A piezoelectric element on the first surface of the diaphragm has a piezoelectric body layer interposed between a first electrode and a second electrode. A support substrate on the first surface of the diaphragm has a space for containing the piezoelectric element. The support substrate includes a first member formed on the first surface of the diaphragm, and a second member formed on the first member. The first member has a first opening for containing the piezoelectric element. The space of the support substrate is defined by the first opening of the first member and the second member. The main material of the first member is resin.

The invention discloses an etching device for a TFT LCD glass substrate and etching method thereof, wherein, the device comprises two bearing boxes, two etching washing grooves, a washing groove and a drying groove; the method is that one of the bearing boxes with a plurality of TFT LCD glass substrates are etched and first-step washed in the etching washing groove; then the bearing box is transferred to the washing groove to be second-step washed; meanwhile, the other bearing box with a plurality of TFT LCD glass substrates are arranged in the other etching washing groove to be etched and first-step washed; the washed TFT LCD glass substrates in the first bearing box are placed in the drying groove to be dried, meanwhile, the other bearing box is transferred to the washing groove to have a plurality of TFT LCD glass substrates second-step washed; then the washed TFT LCD glass substrates in the second bearing box are dried in the drying groove; therefore, the etching of a plurality of TFT LCD glass substrates in the two bearing boxes can be simultaneously finished in one processing, thereby achieving the effect of shortening the etching time and simplifying the etching process.

The invention discloses a capacitive touch screen and a preparation method. The capacitive touch screen comprises a glass panel layer, a film layer and a flexible circuit board, wherein the glass panel layer and the film layer are sequentially laminated from top to bottom, the lower surface of the glass panel layer is provided with an induction electrode layer and an induction electrode outgoing line layer, and the induction electrode outgoing line layer is an ITO (Indium Tin Oxide) induction electrode layer; the upper surface of the film layer is provided with a drive electrode layer and a drive electrode outgoing line layer, the surface of glass panel layer provided with the induction electrode layer and the surface of the film layer provided with the drive electrode layer are mutually glued through a transparent insulating glue layer, and the induction electrode outgoing line layer and the drive electrode outgoing line layer are connected in such a way that the front sides and reverse sides are bonded through the flexible circuit board. According to the capacitive touch screen provided by the invention, the induction electrode layer and the drive electrode layer can be etched by a laser etching technology, and the relevant parameters can be regulated to etch a conducting film and relevant leads better, therefore the etching process can be simplified, the process yield can be greatly improved, and the production cost can be reduced.

The present invention suggest a patch array antenna which secures a side lobe level by changing a width of a feeder without changing a radiator and a radar signal transmitting and receiving apparatus including the same. The present invention provides a patch array antenna, including: a first unit element which includes a first patch which creates a predetermined radiation pattern and first feeders which are formed at both sides of the first patch and have the same width; and a second unit element is adjacent to the first unit element and includes a second patch which creates a radiation pattern and second feeders which are formed at both sides of the second patch and have the same width in which the width of the second feeders is different from the width of the first feeders.

The invention relates to a method for preparing a semiconductor device. The method comprises the steps of providing a semiconductor substrate on which a self-aligning double-pattern mask laminate is formed, wherein the self-aligning double-pattern mask laminate comprises a hard mask layer, a stopping layer and a virtual core material layer which are successively formed; patterning the virtual core material layer for forming a plurality of insulated virtual cores; forming a gap wall on the sidewall of the virtual core; eliminating the virtual cores and reserving the gap wall; etching the stopping layer and the hard mask layer in a manner that the gap wall is used as the mask, thereby transferring the pattern to the hard mask layer; and etching partial of the semiconductor substrate in a manner that the hard mask layer is used as the mask, thereby forming a plurality of fins in the semiconductor substrate. The method of the invention is advantageous in that a state-of-the-art fin structure is prepared through the simple self-aligning mask laminate and a simple technological process.

The invention discloses a phenolic positive photoresist with etching resistance. The phenolic positive photoresist comprises the following main components: phenolic resin, a photosensitive compound and a solvent. The phenolic positive photoresist is characterized by also containing 0.5-30wt% of metal compound capable of being dissolved into the solvent. According to the photoresist disclosed by the invention, in a dry etching process after photoetching, physical bombardment and chemical reaction double etching is carried out on adhesive film patterns by plasma, volatile reactants formed by carbon and oxygen components in an adhesive layer are removed while the metal components are slowly deposited, and a new metal protection layer is formed on the surface of an adhesive film, thereby achieving the target of improving the etching resistance of the photoresist. The photoresist disclosed by the invention can be widely used for the field of production of microelectronic components requiring dry etching.

The invention discloses a display panel and a manufacturing method thereof. The display panel comprises an array substrate, a plurality of reflecting electrodes, a plurality of isolation units, an anode layer and a light-emitting function layer. The plurality of reflecting electrodes are positioned on the array substrate and are distributed in an array manner; one isolation unit is arranged between any two adjacent reflecting electrodes; the anode layer comprises a first anode located on each reflecting electrode and a second anode located on the side, away from the array substrate, of each isolation unit, and each first anode and the adjacent second anode are spaced through the corresponding isolation unit; and the light-emitting function layer is located on the first anodes. According tothe invention, two adjacent first anodes can be naturally disconnected through the isolation unit, and the cavity length of the device can be adjusted through the thickness of the first anodes.

The present invention provides a semiconductor structure and a formation method thereof. The formation method of the semiconductor structure comprises the steps of: providing a substrate, wherein thesubstrate comprises fin columns, and each fin column comprises a bottom portion region, a channel region located on the bottom portion region and a top portion region located on the channel region; forming first isolation layers on the substrate, wherein the first isolation layers cover the bottom portion regions of the fin columns; forming first gate oxide layers and second gate oxide layers at the surfaces of the side walls of the channel regions of the fin columns, wherein the second gate oxide layers are located at the surfaces of the top portions of the first gate oxide layers, and the thicknesses of the first gate oxide layers and the second gate oxide layers are different; forming gate structures at the surfaces of the top portions of the first isolation layers, wherein the gate structures cover the first gate oxide layers and the second gate oxide layers; and forming second isolation layers at the surfaces of the top portions of the gate structures, wherein the second isolationlayers cover the side walls of the top portion regions of the fin columns. The formation method provided by the invention can improve the performances of the semiconductor structure.

The invention discloses a metal-modified superhydrophobic material and a preparation method thereof, belongs to the field of preparation of superhydrophobic materials, and aims to solve the technical problems in environmentally-friendly, energy-saving and efficient preparation of the superhydrophobic material. The preparation method comprises the following steps: S1, preparing conical nano nickel by using a polylactic acid template; S2, impregnating the conical nano nickel in a gold ion-containing gold plating solution for replacement reaction; S3, carrying out cleaning and drying; S4, then impregnating the conical nano nickel in a hexadecyl mercaptan solution for complex reaction; S5, carrying out cleaning and drying, thus obtaining the metal-modified superhydrophobic material, wherein the metal-modified superhydrophobic material is sulfydryl-carried metal gold, and hill-shaped bulges are formed on the surface of the metal-modified superhydrophobic material. The metal-modified superhydrophobic material is prepared according to the preparation method; the metal-modified superhydrophobic material is the sulfydryl-carried metal gold, and the hill-shaped bulges are formed on the surface of the metal-modified superhydrophobic material.

The invention provides a manufacturing method of a three-dimensional memory and the three-dimensional memory, in the manufacturing method of the three-dimensional memory provided by the invention, after an additional pseudo gate covering layer is deposited on a step structure, only the pseudo gate covering layer on the side wall of the step is removed, and the residual pseudo gate covering layer on a semiconductor layer is not removed, instead, the dielectric layer is directly formed on the residual dummy gate covering layer and is etched and filled to form the metal plug, so that the etchingprocess is simplified, the mask is saved, the production efficiency is improved, and the production cost is reduced; meanwhile, when the contact hole is formed by etching, the etching which originallypasses through the contact hole of the semiconductor layer is changed to stay on the dummy gate covering layer, so that a corresponding etching window is reduced, and the design flexibility of the three-dimensional memory is enhanced.

The invention provides a manufacturing method of a semiconductor device. The manufacturing method comprises the following steps: providing a semiconductor substrate, wherein a gate electrode and a side wall structure are formed on the semiconductor substrate, and a self-aligned metal silicide is formed on a source/drain region on the two sides of the gate electrode and the side wall structure; forming a first interlayer dielectric layer, a covering layer and a patterned photoresist layer on the semiconductor substrate in sequence; etching the covering layer and the first interlayer dielectric layer in sequence according to the patterned photoresist layer to expose a contact hole of the self-aligned metal silicide; filling metal in the contact hole; removing excess metal by using a chemical mechanical polishing process, wherein the loss of the first interlayer dielectric layer is not caused in the process of forming the contact hole through etching and in the metal chemical mechanical polishing process. According to the manufacturing process, the etching process can be simplified, the contact hole of a good structure is formed, and the formed contact hole meets the requirements of an integrated circuit.

Hemi-spherical structure and method for fabricating the same. A device includes discrete pillar regions on a substrate, and a pattern layer on the discrete support structures and the substrate. The pattern layer has hemi-spherical film regions on the discrete support structures respectively, and planarized portions on the substrate between the hemi-spherical film regions. Each of the hemi-spherical film regions in a position corresponding to each of the support structures serves as a hemi-spherical structure.

A method of fabricating an LCOS display with a color pixel array contains disposing reflective layers between various color filter layers. The reflective layers are used as etching stop layers between color filter layers so that etching processes are capable of carrying out to define the patterns of the color filter layers in different sub-pixels for forming the color pixel array.