A method for obtaining low bit discrepancy density extension thin film via using neck down extension

Abstract

This invention discloses a method for using necking extension to get extension films of low dislocation density, which utilizes deposition, selective extension and thermal oxidation to prepare GeSi substrates of low dislocation density and channels of high migration rate and gets films of exremely low dislocation density on a silicon wafer meeting the requirement of MOS devices or luminescent devices.

Description

technical field [0001] The invention belongs to the technical field of semiconductor material preparation, and in particular relates to a method for obtaining a low dislocation density epitaxial film by necking down epitaxy. Background technique [0002] Using some new materials in CMOS devices or optoelectronic devices can improve the performance of the devices. For example, using germanium, strained silicon, or strained germanium as a new channel material can reduce the effective mass of carriers in the channel, thereby increasing their mobility, which is an important direction to make MOSFETs adapt to the trend of scaling down the size of transistors ; The band gap of germanium is small, which is suitable for making optoelectronic devices. In order to apply the existing traditional CMOS technology, various new materials need to be fabricated on the silicon substrate, which brings a series of problems. [0003] For strained silicon channels, in order to achieve the strai...

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Problems solved by technology

The disadvantage of this method is that in order to obtain a surface layer film with low dislocation density, the thickness of the buffer layer is required to be very thick. Generally, the thickness of the buffer layer required to deposit germanium on silicon is about 10um.

Such a thick structure is expensive and not compatible with traditional CMOS processes

[0006] Another method is to use high temperature 900°C annealing to perform cyclic annealing on the film, which can make the screw dislocation slide. When the screw dislocation slides to the boundary of the film or when the two dislocation lines cancel each other out, the dislocation in the film However, the best results reported using this method are not as good as those using a graded buffer layer, and , multi-step high-temperature annealing will adversely affect other devices that have been formed in the integrated circuit

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