Isolation structure of shallow plough groove and manufacturing method thereof

Abstract

The invention discloses a manufacturing method of a shallow groove isolating structure, which comprises the following steps of: providing a semiconductor underlay; forming a mat oxide layer and a mat azotization layer on the surface of the semiconductor underlay; carrying out the etch of the mat oxide layer, the mat azotization layer and the semiconductor underlay so as to form grooves; carrying out the sedimentation of a first medium layer at the grooves and the surface of the underlay by a first high density plasma chemical gas deposition technology; and carrying out high-temperature thermal annealing and introduction of oxygen to form a silicon oxide layer on the surface of the first medium layer; carrying out the sedimentation of a second medium layer on the surface of the silicon oxide layer by a second high density plasma chemical gas deposition technology; carrying out rapid thermal annealing; grinding the first medium layer and the second medium layer to the mat azotization layer; and removing the mat azotization layer and the mat oxide layer. The STI isolating structure and the manufacturing method of the invention can realize void-free and zero-defect filling of a high depth-width ratio STI isolating groove.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a shallow trench isolation (STI) structure and a manufacturing method thereof. Background technique [0002] With the rapid development of semiconductor technology, the feature size of semiconductor devices has been significantly reduced, and correspondingly higher requirements have been put forward for the chip manufacturing process. One of the challenging issues is to fill the insulating dielectric uniformly and non-porously between the various film layers or in the trenches to provide sufficient and effective isolation protection. After the manufacturing process enters the deep submicron technology node, shallow trench isolation (shallow trench isolation, STI) structure has been mostly adopted for the isolation between the active regions of components below 0.13 μm, such as MOS devices. The formation of the STI isolation structure first needs to etch a tre...

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Problems solved by technology

Further enhancing the filling ability of trenches to achieve void-free and damage-free filling is still a huge challenge for the HDP-CVD process

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