High density resistor conversion memory and memory operation method thereof

A technology of high-density resistance and storage operation, which is applied in the field of integrated circuits, and can solve problems such as reduced reliability, misoperation, and decreased memory reading speed

Inactive Publication Date: 2009-05-06
林殷茵 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The disadvantage of the interleaved memory array is that since there is no isolation between memory cells, the parasitic current (sneak current) is relatively large, resulting in serious interference bet

Method used

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  • High density resistor conversion memory and memory operation method thereof
  • High density resistor conversion memory and memory operation method thereof
  • High density resistor conversion memory and memory operation method thereof

Examples

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Embodiment Construction

[0049] The invention is described more fully hereinafter in reference to the examples illustrated in the illustrations, providing preferred embodiments but should not be considered limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the relevant art.

[0050] Where the referenced figures are schematic illustrations of idealized embodiments of the invention, the illustrated embodiments of the invention should not be construed as limited to the specific shapes of the regions shown in the figures.

[0051] It will be understood that when an element is referred to as being "on" or "extending over" another element, the element may be directly "on" or "extend" directly on the other element, or it may also be There is an insert element. In contrast, when an element is referred to as being "directly on" or "directly extending over...

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Abstract

The invention belongs to the field of integrated circuit technology and in particular relates to a resistance-conversion memory and a method of conducting memory operations to the memory. The invention adopts binary or over-binary complex metal oxides (such as CuxOs with x being more than 1 and less than or equal to 2, WOxs with x being more than 2 and less than or equal to 3, titanium oxides, nickel oxides, zirconium oxides, aluminum oxides, niobium oxides, tantalum oxides and the like) as memory resistors, each memory module comprises two or more memory resistors, the first electrode of each memory resistor is connected with the same gating device, and the second electrode of each memory resistor is coupled with different bit lines, thus a structure that a plurality of memory resistors share the same gating device in the same memory module is formed. The memory operation comprises a method of write operation and a method of read operation. The memory can improve the integrated memory density significantly and the memory operation fails to interfere with the other modules.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a resistance conversion memory and a storage operation method for the memory. Background technique [0002] Memory occupies an important position in the semiconductor market. Due to the continuous popularization of portable electronic devices, the share of non-volatile memory in the entire memory market is also increasing, of which more than 90% of the share is occupied by FLASH. However, due to the requirement of storing charges, FLASH cannot be expanded unlimitedly with the development of technology generations. It is reported that the limit of FLASH technology is around 32nm, which forces people to look for the next generation of non-volatile memory with better performance. Recently, resistive switching memory (resistive switching memory) has attracted a lot of attention because of its high density, low cost, and the characteristics of breaking through ...

Claims

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Application Information

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IPC IPC(8): G11C11/56G11C16/02G11C16/10H01L27/24H01L23/522
CPCH01L2924/0002
Inventor 林殷茵陈邦明
Owner 林殷茵
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