Semiconductor package and manufacturing method thereof

A packaging and semiconductor technology, applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve the problems of easy delamination of terminals and packaging colloids, poor bonding force of packaging colloids, etc., to reduce Delamination problem, avoid process inconvenience, avoid the effect of cost increase
CN101431031AActive Publication Date: 2009-05-13SILICONWARE PRECISION IND CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SILICONWARE PRECISION IND CO LTD
Publication Date
2009-05-13

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Abstract

The invention relates to a semiconductor packaging element and a preparation method thereof. A first resistance layer is paved on a metal carrier, and a plurality of through openings are arranged in the first resistance layer so that conductive metal layers can be formed in the openings; then the first resistance layer is removed, a dielectric layer is covered on one side of the metal carrier, which is provided with the conductive metal layers, and the dielectric layer is provided with dead holes to expose part of the conductive metal layers; then a conductive circuit is formed on the dielectric layer and a conductive poles are formed in the dead holes so that the conductive circuit is electrically connected to the conductive metal layers through the conductive poles, thereby the conductive circuit and the conductive metal layers utilizes the conductive poles to be effectively jointed with the dielectric layer so as to avoid the problem of layer escape; moreover, the dead holes formed in the dielectric layer are small so that the problems of inconvenient production process and cost increase which are resulted from large openings in the prior art can be avoided; then at least one chip is electrically connected to the conductive circuit and a wrapping chip, a packaging rubber body of the conductive circuit are formed, the metal carrier is removed, and then the semiconductor packaging element without a chip bearing component is formed.
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Description

technical field

[0001] The invention relates to a semiconductor package and its manufacturing method, in particular to a semiconductor package without chip carrier and its manufacturing method. Background technique

[0002] Traditional semiconductor chips use a lead frame as a chip carrier to form a semiconductor package. The lead frame includes a chip seat and a plurality of leads formed around the chip seat. After the semiconductor chip is bonded to the chip seat and the chip and the leads are electrically connected by welding wires, the lead frame is covered with an encapsulation resin. The chip, the chip seat, the bonding wire and the inner section of the lead form the semiconductor package with a lead frame.

[0003] There are many types and types of semiconductor packages that use lead frames as chip carriers. As far as Quad Flat Non-leaded (QFN) semiconductor packages are concerned, they are characterized in that no external leads are provided, that is, There is no ...

Claims

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