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Packaging structure with reconfiguration chip and method thereof

A packaging structure and reconfiguration technology, applied in the direction of electrical components, electrical solid devices, circuits, etc., can solve problems such as misalignment, package warpage, and large resistance value

Active Publication Date: 2010-01-06
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This thinned chip is reconfigured on another substrate, and then multiple chips are formed into a package by injection molding; because the chip is very thin, the package is also very thin, so when the package is detached After the substrate, the stress of the package itself will cause the package to warp, increasing the difficulty of the subsequent cutting process
[0006] In addition, after the wafer is diced, when it is reconfigured on another substrate, since the size of the new substrate is larger than the original size, it will not be aligned in the subsequent ball planting process, and the reliability of the packaging structure will be reduced.
For this reason, the present invention provides a kind of welding pad that preforms copper column on the chip, and then exposes copper column through thinning process, so can effectively solve the problems that cannot be aligned during ball planting and package body produces warpage question
[0007] In addition, during the entire packaging process, there will also be a problem that the manufacturing equipment will generate excessive local pressure on the chip during ball planting, which may damage the chip; at the same time, it may also be caused by the material of the ball planting. The resistance value between the pads becomes larger, which affects the performance of the chip and other issues

Method used

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  • Packaging structure with reconfiguration chip and method thereof
  • Packaging structure with reconfiguration chip and method thereof
  • Packaging structure with reconfiguration chip and method thereof

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Embodiment Construction

[0031] The direction of the present invention discussed here is a chip reconfiguration packaging method, in which multiple chips are reconfigured on another substrate and then packaged. In order to provide a thorough understanding of the present invention, detailed steps and components thereof will be set forth in the following description. Obviously, the practice of the present invention is not limited to the specific details of the manner in which the chips are stacked that will be familiar to those of ordinary skill in the disclosed art. On the other hand, the well-known chip formation method and detailed steps of chip thinning and other back-end processes are not described in detail to avoid unnecessary limitations of the present invention. However, for the preferred embodiments of the present invention, it will be described in detail as follows, but in addition to these detailed descriptions, the present invention can also be widely implemented in other embodiments, and t...

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PUM

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Abstract

The invention discloses a packaging structure with a reconfiguration chip, comprising a chip, a first high polymer material layer, a sealing compound body, a second high polymer material layer and a base plate; wherein, the active surface of the chip is configured with a plurality of solder pads; the first high polymer material layer covers the active surface of the chip and is electrically connected with the solder pads by a plurality of conducting posts; the sealing compound body is used for covering the four surfaces of the chip; the second high polymer material layer covers the sealing compound body and the first high polymer material layer and exposes out of a plurality of conducting posts; a plurality of fan-shaped metal wire sections cover the second high polymer material layer, and one end of each metal wire section is electrically connected with each conducting post; a plurality of conducting elements are electrically connected with the other end of each metal wire section; the base plate is fixedly connected with the lower surface of the chip by an adhesion layer.

Description

technical field [0001] The invention relates to a semiconductor packaging method, in particular to a packaging method for reconfiguring chips with different sizes and functions. Background technique [0002] Semiconductor technology has developed quite rapidly, so the miniaturized semiconductor chip (Dice) must have diversified functional requirements, so that the semiconductor chip must be configured with more input / output pads (I / O pads) in a small area. O pads), so that the density of metal pins (pins) is also rapidly increased. Therefore, the early lead frame packaging technology is no longer suitable for high-density metal pins; therefore, a ball array (BallGrid Array: BGA) packaging technology has been developed. In addition to the advantages of higher density than lead frame packaging, ball array packaging , and its solder balls are less prone to damage and deformation. [0003] With the popularity of 3C products, such as: mobile phone (Cell Phone), personal digital...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/48H01L23/31H01L25/00H01L21/50H01L21/60H01L21/56H01L21/78
CPCH01L2924/01015H01L2924/01023H01L2224/20H01L2924/01079H01L2224/97H01L2924/01068H01L2924/12041H01L2224/04105H01L24/97H01L2924/01033H01L2924/15311H01L2924/01029H01L24/19H01L2924/01078H01L2924/01094H01L2224/19H01L2224/24H01L2224/24137H01L2224/32225H01L2224/32245H01L2224/73267H01L2224/92244H01L2224/94
Inventor 陈煜仁
Owner CHIPMOS TECH INC
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