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Method for manufacturing gate structure

A gate structure and manufacturing method technology, applied in semiconductor/solid-state device manufacturing, electrical components, semiconductor devices, etc., can solve problems such as device failure and design size reduction

Active Publication Date: 2012-10-31
SEMICON MFG INT (BEIJING) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] With the gradual development of ultra-large integrated circuits, the design size of devices continues to shrink, so in the process of gate fabrication, tiny flaws may cause the failure of the entire device
The gate of the DRAM manufactured by the existing process will also fail the device

Method used

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  • Method for manufacturing gate structure
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  • Method for manufacturing gate structure

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Experimental program
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Embodiment Construction

[0030] This embodiment provides a method for manufacturing a gate, which can remove metaphosphoric acid produced on the surface of the polysilicon layer. Hereinafter, the specific implementation manner of the present application will be described in detail by taking the manufacturing of the gate (ie, word-line) of the MOS transistor in the DRAM as an example.

[0031] The inventors of the present application have found that when DRAM is manufactured according to the prior art, transistor leakage phenomenon is likely to occur, resulting in a decrease in product yield. figure 1 is the transistor leakage current profile found at the wafer scale, such as figure 1 As shown, when eight wafers 101, 102, 103, 104, 105, 106, 107, and 108 were inspected, it was found that the yield rate of transistors on the wafer was uneven, with the yield rate as high as 72.95% and as low as 26.77%. .

[0032] The inventors of the present application also found that in the gate stack structure of th...

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PUM

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Abstract

The invention provides a method for manufacturing a gate structure. The method comprises the following steps of: providing a semiconductor substrate provided with a phosphorus doped polysilicon layer; using a solvent capable of dissolving metaphosphoric acid to wash the polysilicon layer; forming a layer or multi-layers of stacks on the polysilicon layer; and etching the composite layer on the semiconductor substrate to form the gate structure. By using the solvent capable of dissolving metaphosphoric acid to wash the polysilicon layer, the metaphosphoric acid generated on the surface of the polysilicon layer can be removed, the gate structure deformation which is caused by the metaphosphoric acid can be avoided, and furthermore the problem of transistor electric leakage caused by the deformation of the gate structure, can be solved.

Description

technical field [0001] The present application relates to the field of semiconductor manufacturing, and in particular to a method for manufacturing a gate structure. Background technique [0002] With the continuous development of integrated circuit technology, electronic products are increasingly developing in the direction of miniaturization, intelligence, high performance and high reliability. In order to improve the economy and efficiency of storage units, the integration level of DRAM (Dynamic Random-Access Memory, DRAM) as a memory is getting higher and higher. [0003] A DRAM storage unit is composed of a metal oxide semiconductor transistor (Metal Oxide Semiconductor, MOS) and a series capacitor. The MOS transistor includes a gate and corresponding two doped regions. The two doped regions are functionally defined as source and drain. [0004] The gates in a typical DRAM storage unit are generally designed to have a stacked structure. Wherein, it includes one laye...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L21/306
Inventor 彭坤
Owner SEMICON MFG INT (BEIJING) CORP