MOS (Metal Oxide Semiconductor) transistor and forming method thereof

Abstract

The invention provides a forming method of an MOS transistor, which comprises the steps of: sequentially forming a gate dielectric layer and a grid electrode on a semiconductor substrate, wherein the gate dielectric layer and the grid electrode form a grid electrode structure; forming offset side walls at two sides of the grid electrode structure, wherein the width of each offset side wall is 8-9 nanometers; forming source / drain extension areas in the grid electrode structure and the semiconductor substrate at the two sides of the offset side walls; forming interstitial walls on the offset side walls; and forming source / drain extension areas in the semiconductor substrate at the interstitial walls and the two sides of the grid electrode structure. The invention improves the stability of a hot carrier and reduces hot carrier effect.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, in particular to a MOS transistor and a method for forming the same. Background technique [0002] With the continuous development and progress of semiconductor manufacturing technology and related supporting technologies, the number of transistors contained in a unit area is increasing, the integration degree of integrated circuits is getting higher and higher, and the size of each transistor is getting smaller and smaller. The requirements for the manufacturing process are also getting higher and higher. [0003] The traditional manufacturing method of MOS transistor, such as the Chinese patent with the application number of 03145409, provides technical solutions, such as figure 1 As shown, a gate dielectric layer 2 and a gate electrode 3 are sequentially formed on the semiconductor substrate 1. The gate dielectric layer 2 is silicon dioxide or a silicon oxide-silic...

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Problems solved by technology

[0006] However, the critical dimension of the offset sidewall 27 on the existing MOS transistor is relatively small, causing the channel length to fail to achieve the expected effect, increasing the instability of hot carriers, and further reducing the reliability of the semiconductor device

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