Manufacturing method of semiconductor device

Abstract

The invention provides a method for manufacturing a semiconductor device, comprising providing a substrate having a first component region, a second component region and a capacitor region; forming a patterned first oxide layer in the second component region; Forming a second oxide layer comprehensively; forming a plurality of patterned first conductive layers and a plurality of patterned dielectric layers on the second oxide layer in the first component region, the second component region, and the capacitor region respectively layer; forming a patterned second conductive layer and a patterned third oxide layer covered by the above-mentioned patterned second conductive layer in the above-mentioned capacitor region, wherein the above-mentioned patterned first conductive layer and the above-mentioned pattern located in the above-mentioned capacitor region The second conductive layer is respectively used as a lower electrode and an upper electrode of a capacitor.

Description

technical field [0001] The present invention relates to a manufacturing method of a semiconductor device, in particular to a manufacturing method of a semiconductor device having a low-voltage component, a high-voltage component and a polysilicon-insulating layer-polysilicon capacitor (PIP capacitor). Background technique [0002] In the manufacturing process of analog components, the combined structure of the gate polysilicon layer, the oxide layer and another polysilicon layer can be used as a polysilicon-insulating layer-polysilicon capacitor (PIP capacitor, hereinafter referred to as PIP capacitor), wherein the above-mentioned gate polysilicon layer, The oxide layer and another polysilicon layer serve as the lower electrode, dielectric layer and upper electrode of the PIP capacitor, respectively. The material of the dielectric layer of the PIP capacitor may include oxide, nitride-oxide (NO) or oxide-nitride-oxide (ONO). In order to achieve a higher capacitance value and...

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Problems solved by technology

Therefore, when the unwanted dielectric layer is removed by the subsequent etching process, the dielectric layer formed on the sidewall of the gate of the component will become difficult to remove, and even damage the gate or the bottom electrode

Especially when the dielectric layer is a nitride layer-oxide layer (NO) or an oxide layer-nitride layer-oxide layer (ONO), if dilute hydrofluoric acid solution (DHF) is used as an etchant, wet etching When removing the dielectric layer, only the oxide layer can be removed, but it is difficult to remove the nitride layer

If hot phosphoric acid (H 3 PO 4 ) as an etchant, when the dielectric layer is removed by wet etching, the nitride layer can be removed, but it will damage the gate or bottom electrode such as polysilicon

Also, if using CF 4 / Cl 2 / HBr is used as an etchant. When removing the dielectric layer by dry etching, the nitride layer can be removed, but it will also damage the gate or bottom electrode of polysilicon, for example.

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