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Bottom source nmos triggered zener clamp for configuring an ultra-low voltage transient voltage suppressor (tvs)

A technology of transient voltage suppression and oxide semiconductors, which is applied in the production of transient voltage suppressors and improved circuit structures, and can solve problems affecting the response time of transient voltage suppressor circuits.

Inactive Publication Date: 2010-12-29
ALPHA & OMEGA SEMICON INT LP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Also, the trigger circuit is divided into multiple stages, which may affect the overall response time of the transient voltage suppressor circuit

Method used

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  • Bottom source nmos triggered zener clamp for configuring an ultra-low voltage transient voltage suppressor (tvs)
  • Bottom source nmos triggered zener clamp for configuring an ultra-low voltage transient voltage suppressor (tvs)
  • Bottom source nmos triggered zener clamp for configuring an ultra-low voltage transient voltage suppressor (tvs)

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Embodiment Construction

[0037] Figure 4A and Figure 4B Respectively represent the cross-sectional view of the transient voltage suppressor 100 of the present invention and the corresponding equivalent circuit diagram. Figure 4C is a current-voltage graph showing the current conduction and voltage characteristics of the transient voltage suppressor 100 . The transient voltage suppressor device 100 is formed in an N+ substrate 105 with an N- epitaxial layer 110 above the substrate, an anode terminal 115 is arranged on the bottom of the substrate, a cathode terminal 120 is arranged on the top surface of the substrate, and the substrate and the N+ drain The pole / collector region 130 is in contact. As shown in the equivalent circuit 100 , the device includes an NMOSFET 160 and an NPN bipolar transistor 170 in addition to the transient voltage suppressor diode 150 . The connection mode of the terminals of the NMOS 160 and the NPN bipolar transistor 170 in this structure will be described below. The ...

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Abstract

A low voltage transient voltage suppressing (TVS) device supported on a semiconductor substrate supporting an epitaxial layer thereon includes a bottom-source metal oxide semiconductor field effect transistor (BS-MOSFET) comprises a trench gate surrounded by a drain region encompassed in a body region disposed near a top surface of the semiconductor substrate wherein the drain region interfaces with the body region constituting a junction diode and the drain region encompassed in the body region on top of the epitaxial layer constituting a bipolar transistor with a top electrode disposed on the top surface of the semiconductor functioning as a drain / collector terminal and a bottom electrode disposed on a bottom surface of the semiconductor substrate functioning as a source / emitter electrode. The body regions further comprises a surface body contact region electrically connected to a body-to-source short-connection thus connecting the body region to the bottom electrode functioning as the source / emitter terminal. The gate may be shorted to the drain for configuring the BS-MOSFET transistor into a two terminal device with a gate-to-source voltage equal to a drain-to-source voltage. The drain / collector / cathode terminal disposed on top of the trench gate turns on the BS-MOSFET upon application of a threshold voltage of the BS-MOSFET thus triggering the bipolar transistor for clamping and suppressing a transient voltage substantially near a threshold voltage of the BS-MOSFET.

Description

technical field [0001] The invention generally relates to a circuit structure and a manufacturing method of a transient voltage suppressor. More precisely, the present invention relates to an improved circuit structure and a manufacturing method of an improved transient voltage suppressor, by establishing a bottom source N-type metal oxide silicon trigger in the transient voltage suppressor circuit Zener clamp structure for low voltage protection. Background technique [0002] Transient voltage suppressors are commonly used to protect integrated circuits from damage caused by sudden overvoltages on integrated circuits. Integrated circuits are designed within the normal range of voltages. However, some unexpected and uncontrollable high-voltage phenomena, such as electrostatic discharge, electrical fast transients, and secondary lightning, may have a sudden attack on the circuit. Transient voltage suppressors are used to protect circuits, and try to avoid possible damage t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/04H01L29/06H01L21/77
CPCH01L29/732H01L27/0266
Inventor 马督儿·博德
Owner ALPHA & OMEGA SEMICON INT LP
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