Unlock instant, AI-driven research and patent intelligence for your innovation.

SONOS (Silicon Oxide Nitride Oxide Semiconductor) flash memory unit and formation method thereof

A memory cell and flash technology, which is applied in electrical components, electric solid state devices, semiconductor devices, etc., can solve the problems of difficult wiring, the read and write performance of memory cells, and the response rate cannot meet high integration, and achieves a simple structure and meets the requirements of reading and writing. Write performance and response rate requirements, and the effect of improving strobe speed

Inactive Publication Date: 2013-09-11
SEMICON MFG INT (SHANGHAI) CORP +1
View PDF1 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0010] In the existing SONOS flash memory, the gate electrode of the memory cell also plays the role of turning on the MOS transistor to form a conductive channel and controlling the silicon oxide-silicon nitride-silicon oxide layer 102 to store electrons. The read / write performance and response rate have gradually failed to meet the needs of highly integrated memory arrays, especially embedded system memory arrays. On the other hand, the bit lines connected to the source or drain need to lead out interconnect lines from the bottom of the memory cells. Difficulties in routing after device scaling

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • SONOS (Silicon Oxide Nitride Oxide Semiconductor) flash memory unit and formation method thereof
  • SONOS (Silicon Oxide Nitride Oxide Semiconductor) flash memory unit and formation method thereof
  • SONOS (Silicon Oxide Nitride Oxide Semiconductor) flash memory unit and formation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0048] The forming method of a kind of SONOS flash memory cell that the present invention proposes, concrete step flow chart is as follows image 3 Shown:

[0049] S1. Provide a semiconductor substrate, sequentially form a gate dielectric layer, a gate electrode, a silicide film layer, and a mask layer on the semiconductor substrate; and etch part of the mask layer, and then form self-aligned sides on both sides of the mask layer wall; using the mask layer and the self-aligned sidewall as a mask, sequentially etching the silicide thin film layer, gate electrode and gate dielectric layer to form a first gate.

[0050] Wherein, a gate protection layer is formed on the surface of the silicide thin film layer to protect the silicide thin film layer from subsequent process damage. In modern memory technology, the silicide film layer can reduce the contact resistance of the gate to meet the read and write response requirements of high-speed memory.

[0051] The self-aligned sidewa...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides an SONOS (Silicon Oxide Nitride Oxide Semiconductor) flash memory unit and a formation method thereof. The SONOS flash memory unit comprises a semiconductor substrate, a field effect transistor, a selection grid, a silicone oxide-nitride oxide-silicone oxide layer and a control grid, wherein the field effect transistor is formed on the semiconductor substrate, and a channel of the field effect transistor is connected with a source region and a drain region and comprises a first channel region adjacent to the drain region and a second channel region adjacent to the source region; the selection grid is formed on the surface of the first channel region and comprises a grid dielectric layer, a grid electrode and a silicide film layer on the grid electrode in sequence; the silicone oxide-nitride oxide-silicone oxide layer is at least formed on the surface of the second channel region; and the control grid is formed on the surface of the silicone oxide-nitride oxide-silicone oxide layer. The formed SONOS flash memory unit meets the requirements of a memory array of an embedded system for reading and writing performance and response speed and is compatible with the traditional CMOS (Complementary Metal Oxide Semiconductor) process; the structure is simple, so that the interconnecting wire of the source region and the drain region is easily leaded out, which is convenient for wiring and integration to form the memory array.

Description

technical field [0001] The invention relates to a flash memory, in particular to a charge trap unit (SONOS) flash memory and a forming method thereof. Background technique [0002] In general, semiconductor memories used to store data are classified into volatile memories and nonvolatile memories, volatile memories are prone to lose their data when power is interrupted, and nonvolatile memories are retained even after the power supply is turned off On-chip information. Compared with other non-volatile storage technologies (eg, disk drives), non-volatile semiconductor memories are characterized by low cost and high density. Therefore, non-volatile memory has been widely used in various fields, including embedded systems, such as PCs and peripherals, telecommunication switches, cellular phones, network interconnection equipment, instrumentation and automotive devices, as well as emerging voice, image , Data storage products such as digital cameras, digital voice recorders an...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/115H01L21/8247H01L21/28H10B69/00
Inventor 詹奕鹏季明华
Owner SEMICON MFG INT (SHANGHAI) CORP