Cooling structure of chip

Abstract

The invention provides a cooling structure of a chip, belonging to the field of microelectronics. The cooling structure comprises a P-type superlattice layer and an N-type superlattice layer which are formed on the upper surface of the chip through oxide isolation; a P-type superlattice and an N-type superlattice are isolated by silicon dioxide; the P-type superlattice is electrically connected with a metal layer of the chip through a touch hole, wherein the metal layer of the chip is connected with a low-potential power supply, and meanwhile, a metal layer formed above the P-type superlattice is connected with an external power supply; the N-type superlattice is electrically connected with a metal layer of the chip through a contact hole, wherein the metal layer of the chip is connected with a high-potential power supply, and meanwhile, a metal layer formed above the N-type superlattice is connected with an external power supply; and the potential of the external power supply connected with the P-type superlattice is lower than that of the external power supply connected with the N-type superlattice. By utilizing the characteristics of low thermal conductance and similar phonon localization behaviors of the superlattices, the heat of the chip can be radiated, and meanwhile, the heat from the surrounding environment can be inhibited to transfer to the chip.

Description

technical field [0001] The invention belongs to the field of microelectronics, in particular to a thermoelectric cooling structure, which is mainly used in semiconductor integrated circuit chips. Background technique [0002] With the reduction of the device scale, the increase of the device integration density of a single chip and the increase of the clock frequency lead to the rapid increase of the power consumption of the chip. The sharp increase in power consumption brings about an increase in chip temperature, which will not only degrade the performance of devices and circuits, but also affect the reliability of devices and circuits. Today's high-performance chips generate heat of up to 100 watts per square centimeter. Future chips are likely to generate even higher heat, with chips expected to reach temperatures as high as the surface of the sun without efficient cooling. [0003] The current heat dissipation methods of chips are mainly air-cooled, water-cooled, and ...

AI Technical Summary

Problems solved by technology

Among these methods, the first three methods are relatively mature in technology. Among them, the heat dissipation efficiency of air-cooled heat dissipation and water-cooled heat dissipation is lower than that of semiconductor refrigeration chips based on the Peltier effect, and water-cooled heat dissipation also has hidden dangers of reliability of liquid leakage.

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