Voltage-resistant device using high-dielectric constant gate dielectric

Abstract

The invention discloses a voltage-resistant device using a high-dielectric constant gate dielectric and relates to a semiconductor power device. The voltage-resistant device using the high-dielectric constant gate dielectric comprises a substrate, an epitaxial region, a source injection region, a channel injection region, a drain injection region, a drift region, a gate, a P plus injection region, a source and a drain, wherein the source injection region, the channel injection region, the drain injection region, the drift region and the P plus injection region constitute a first layer, the voltage-resistant device further comprises a composite dielectric layer formed by a high-dielectric constant dielectric layer and a SiO2 (silicon dioxide) buffer layer, the gate, the drain and the source are positioned above the composite dielectric layer, the drain and the source are connected to the injection regions below the composite dielectric layer through small holes of the composite dielectric layer respectively, the SiO2 buffer layer is uniformly covered above the first layer, and the high-dielectric constant dielectric layer with uniform thickness is positioned above the SiO2 buffer layer. In the aspect of the device, the voltage resistance of the gate, the source and drain or cathode and anode of the device can be simultaneously improved, and the specific on-resistance can be reduced; and in the aspect of application, a higher voltage is allowed to use for performing gate drive, and the on-resistance of the voltage-resistant device can be reduced.

Description

technical field [0001] The invention relates to a semiconductor power device, in particular to the gate dielectric layer material and structure of a lateral high voltage device. Background technique [0002] As we all know, gate-controlled power devices such as LDMOS, LIGBT, IGCT, Offset-gate MOS, lateral MCT, and lateral IEGT have been widely used in power integrated circuits. In applications, power devices usually work in two states: off and on. In the off state, the gate voltage is low and the drift region withstands the voltage, while in the on state, the gate voltage is high. In the case of a fixed device structure, the higher the gate voltage, the smaller the on-resistance, and the higher the efficiency of the power circuit, but too high a gate voltage will cause breakdown of the gate dielectric. Traditional power devices use SiO 2 As a gate isolation layer, this is due to the SiO 2 It has the advantages of good interface state with Si, stable insulation performance...

AI Technical Summary

Problems solved by technology

But SiO 2 The dielectric constant of SiO is only 3.9. In order to ensure that the threshold voltage of power devices is small, SiO 2 The thickness of the gate dielectric should not be too thick, the thinner the gate dielectric, the lower the breakdown voltage of the gate, so pure SiO 2 The use of a dielectric limits the gate voltage, see Figure 4 , 5

[0003] Invention patent 02142183 in China: "Surface (lateral) withstand voltage structure with high dielectric constant film", by using stepped or sloped field plates to achieve the optimal distribution of electric flux in the drift region and improve the source-drain breakdown voltage of power devices , Patent 1399348 The high dielectric constant dielectric film covers the withstand voltage area, and the electric flux is adjusted by adding a metal field plate, while the gate dielectric still uses traditional SiO 2 medium, cannot improve the gate withstand voltage

[0004] In China Invention Patent 200580024431: "Semiconductor Device with High-k Gate Dielectric and Metal Gate Electrode", the gate high dielectric constant dielectric is used to improve gate withstand voltage and reduce leakage current, but this patent is only applied to the drift-free region low-voltage devices, can not improve the source and drain or cathode and anode withstand voltage

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