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Laminate, circuit board and semiconductor device

A technology of laminates and insulating resins, which can be used in the manufacture of semiconductor devices, electric solid-state devices, and semiconductor/solid-state devices, and can solve problems such as poor punching processing.

Inactive Publication Date: 2011-08-24
SUMITOMO BAKELITE CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the use of a highly rigid base material may cause new problems such as poor punching processing, so a laminate with little warpage before and after installation is required

Method used

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  • Laminate, circuit board and semiconductor device
  • Laminate, circuit board and semiconductor device
  • Laminate, circuit board and semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0129] (1) Preparation of resin varnish

[0130] At room temperature, 14.7 parts by weight of novolak type cyanate resin (Primaset PT-30, product of Lonza Japan Co., Ltd., weight average molecular weight: about 700), 8 parts by weight of biphenyl dimethylene type Epoxy resin (NC-3000H, product of Nippon Kayaku Co., Ltd., epoxy equivalent: 275), 7 parts by weight of biphenyl dimethylene type phenolic resin (MEH-7851-3H, product of Meiwa Chemical Industry Co., Ltd. , hydroxyl equivalent: 230) and 0.3 parts by weight of epoxy silane type coupling agent (A-187, product of GE Toshiba Organic Silicon Co., Ltd.) dissolved in methyl ethyl ketone, and 70 parts by weight of spherical fused silica (SO -25R, a product of Admatechs Co., Ltd., average particle diameter: 0.5 μm). The resulting mixture was stirred for 10 minutes using a high-speed stirrer to obtain a resin varnish.

[0131] (2) Preparation of prepreg

[0132] A glass cloth (WEA-2116, product of Nitto Bosho Co., Ltd., thick...

Embodiment 2

[0143] Obtain a semiconductor device in the same manner as in Example 1, except that at room temperature 19.7 parts by weight of novolac cyanate resin (Primaset PT-30, the product of Lonza Japan Co., Ltd., weight-average molecular weight: about 700), 11 parts by weight of biphenyl dimethylene type epoxy resin (NC-3000H, the product of Nippon Kayaku Co., Ltd., epoxy equivalent: 275), 9 parts by weight of biphenyl dimethylene type Phenolic resin (MEH-7851-3H, product of Meiwa Chemical Industry Co., Ltd., hydroxyl equivalent: 230) and 0.3 parts by weight of epoxy silane coupling agent (A-187, product of GE Toshiba Silicone Co., Ltd.) were dissolved in methyl ethyl ketone , and use 60 parts by weight of spherical fused silica (SO-25R, a product of Admatechs Co., Ltd., average particle size: 0.5 μm).

Embodiment 3

[0145] A semiconductor device was obtained in the same manner as in Example 2, except that an electrolytic copper foil (3EC-M3-VLP, product of Mitsui Kinzoku) having a tensile modulus of elasticity at 25° C. of 60 GPa was used.

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Abstract

Disclosed is a laminate comprising an insulating resin layer and a metal foil formed in contact with the insulating resin layer. The laminate is characterized in that when the tensile modulus of elasticity (A) of the metal foil at 25 DEG C is not less than 30 GPa and not more than 60 GPa, the thermal expansion coefficient (B) of the metal foil is not less than 10 ppm and not more than 30 ppm, the bending modulus of elasticity (C) of the insulating resin layer at 25 DEG C is not less than 20 GPa and not more than 35 GPa, and the thermal expansion coefficient (D) of the insulating resin layer in the XY direction from 25 DEG C to Tg is not less than 5 ppm and not more than 15 ppm, the interface stress between the insulating resin layer and the metal foil, which is expressed by formula (1), is not more than 7x104. Interface stress = {(B) -(D)} {(A) -(C)} {Tg - 25[ DEG C]} (1) Tg: glass transition temperature of the insulating resin layer.

Description

technical field [0001] The present invention relates to laminates, circuit boards and semiconductor devices. Background technique [0002] With the recent miniaturization and high functionality of electronic equipment, materials for printed wiring boards mounted thereon are required to be compatible with miniaturization, thinning, high integration, high multi-layering, and high heat resistance. The nature of cooperation. With these requirements, warpage in printed wiring boards becomes a problem. [0003] When warpage occurs in the printed circuit board, during the mounting process, there may be defects such as mounting defects of components, connection failure, sticking on the production line, etc. In addition, even for mounted products, when the printed wiring board is warped in the thermal cycle test, it is easy to apply stress between the printed wiring board and the mounted parts, which can easily cause through-hole disconnection and component connection parts circui...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B32B15/08B32B15/092
CPCH05K3/022B32B27/30H05K2201/068H05K1/0353H05K1/09B32B27/04B32B17/04B32B27/38H05K2201/0355B32B15/14H05K2201/0209H01L2924/0002Y10T428/266Y10T428/12569Y10T428/264Y10T428/31678Y10T428/31529H01L2924/00B32B15/08B32B15/092H01L21/00
Inventor 高桥昭仁
Owner SUMITOMO BAKELITE CO LTD
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