Reconfigurable network on mating plate and configuration method

Abstract

The invention discloses a reconfigurable network on a mating plate and a configuration method and is intended to solve the problem that it fails to flexibly configure a network in the prior art. The invention is characterized in that a micro ring resonator optical switch is introduced in the connection of an IP nucleus and an adjacent light router; the state of the micro ring resonator optical switch is controlled for different applications; the light router connected to the IP nucleus is flexibly selected such that a network reconstruction can be realized. The configuration steps are: (1) determining the optimal dimension of the network needed; (2) determining an initial set based on the communication relations and traffic loads among the IP nucleuses; (3) adding the IP nucleuses which are not included in the initial set into the initial set based on certain rules or forming a new set; (4) carrying out a layout based on the communication relations in a set or among different sets according to a certain sequence. According to the invention, the restriction of a definite network composition is broken, the reconstruction of the network composition is realized based on specific characteristics of the applications through changing the topology connection relation, the design flexibility is guaranteed and the network performance is optimized.

Description

technical field [0001] The invention belongs to the field of network technology, in particular to a structure of an optical on-chip network and a network configuration method, which are applicable to the design of an optical on-chip network. Background technique [0002] The rapid development of integrated circuit technology and semiconductor technology promotes the development of chips in the direction of multi-core. In the design of multi-core chips, the system-on-chip SoC based on the bus structure first appeared. There are challenges in terms of power consumption, latency and reliability. The network-on-chip NoC integrates the idea and technology of computer network into the chip design, and replaces the traditional bus structure with network interconnection, which completely solves the problems faced by SoC from the perspective of architecture. On-chip communication mode, power consumption, reusability, Scalability, clock synchronization, and other aspects have incompa...

AI Technical Summary

Problems solved by technology

This method is limited by the fixed network structure, and the established connection relationship between each IP core and optical router in the fixed network structure brings difficulties to the further optimization of the network.

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