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Abrasive composition and method for manufacturing semiconductor integrated circuit device

A manufacturing method and integrated circuit technology, which are applied to polishing compositions containing abrasives, semiconductor/solid-state device manufacturing, grinding devices, etc., can solve the problems of not being able to completely deal with copper residues, and not being able to sufficiently reduce the grinding speed of the barrier layer, to achieve Good grinding speed, elimination of copper residue, and the effect of suppressing the grinding speed

Inactive Publication Date: 2011-10-05
ASAHI GLASS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this polishing composition cannot completely deal with copper residue, or cannot sufficiently reduce the polishing rate of the barrier layer (for example, refer to Patent Document 1).

Method used

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  • Abrasive composition and method for manufacturing semiconductor integrated circuit device
  • Abrasive composition and method for manufacturing semiconductor integrated circuit device
  • Abrasive composition and method for manufacturing semiconductor integrated circuit device

Examples

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Embodiment

[0148] Hereinafter, although an Example demonstrates this invention, this invention is not limited to the following description. Examples 6-11, 13-15, 17-20, 26-29, 31-34 and 39-42 are examples, and examples 1-5, 12, 16, 21-25, 30 and 35-38 are comparative examples.

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Abstract

An abrasive composition which is used during the pattern formation wherein buried copper wiring and insulating layers are alternately formed by grinding each copper layer which is formed on each insulating layer via a barrier layer, specifically in a process wherein each copper layer is ground until the barrier layer adjacent thereto is exposed. The abrasive composition contains an alicyclic resin acid, a colloidal silica and tetramethylammonium ions. The colloidal silica is contained in an amount of 0.1-1.5% by mass relative to the abrasive composition, and has an average primary particle diameter of 10-40 nm and an average secondary particle diameter of 30-80 nm, with the value obtained by multiplying the average secondary particle diameter by the amount thereof contained in the composition being within the range of 10-40.

Description

technical field [0001] The present invention relates to a novel polishing composition suitable for semiconductor integrated circuits and the like. Background technique [0002] In recent years, various microfabrication technologies such as miniaturization of semiconductor elements and multilayer wiring have been developed in response to increasing demand for high integration of semiconductor integrated circuits. Therefore, in chemical mechanical polishing (CMP, hereinafter referred to as CMP) involving wiring formation, there is a great need for a novel polishing composition. In addition, the polishing composition for CMP requires very strict adjustments because it requires extremely high-precision polishing compared with a simple mechanical polishing composition. [0003] As a specific demand for a new polishing composition, there is the prevention of unevenness on the surface. [0004] The multilayering of wiring refers to forming a new circuit using photolithography aft...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/304B24B37/00C09K3/14
CPCC09K3/1409C09K3/1463H01L21/7684H01L21/3212C09G1/02C09K3/14H01L21/304B24B37/00
Inventor 吉田伊织神谷广幸
Owner ASAHI GLASS CO LTD
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