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Dry-process etching method for HfSiAlON high-K dielectric

A dry etching and dielectric technology, which is applied in the manufacture of electrical components, circuits, semiconductors/solid-state devices, etc., can solve the problems of low selection of silicon substrates, poor volatility of halogen-based etching products, etc., and achieve high compatibility and high The effect of selection than removal

Inactive Publication Date: 2012-01-11
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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Problems solved by technology

[0004] The main problems of Hf-based high-K dry etching are the poor volatility of halogen-based etching products and the low selectivity to silicon substrates

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  • Dry-process etching method for HfSiAlON high-K dielectric
  • Dry-process etching method for HfSiAlON high-K dielectric
  • Dry-process etching method for HfSiAlON high-K dielectric

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Embodiment Construction

[0021] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0022] The dry etching method of this HfSiAlON high-K medium provided by the present invention is on Si substrate / SiO 2 After forming a HfSiAlON high-K gate dielectric layer on the interface layer and performing rapid thermal annealing, BCl 3 The base etching gas removes the HfSiAlON high-K gate dielectric with a high selectivity ratio.

[0023] Wherein, the HfSiAlON high-K gate dielectric layer is formed on the Si substrate / SiO by physical vapor deposition, metal organic chemical vapor deposition or atomic layer deposition process. 2 on the interface layer. The temperature of the rapid thermal annealing treatment of the HfSiAlON high-K gate dielectric layer is 700° C. to 950° C., and the treatment time is 10 seconds to...

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Abstract

The invention relates to the technical field of manufacture of integrated circuits and discloses a dry-process etching method for HfSiAlON high-K dielectric. The main problem for dry-process etching of an Hf-based high-K material is that a halogen-based etching product is poor in volatility and the Hf-based high-K material is low in selection ratio for a silicon substrate. Because BCl3 gas not only can be used for etching a metal oxide but also can react with the Si substrate to generate a Si-B bond, the slection ratio of the high-K material to the Si substrate is increased. Therefore, by adopting the BCl3-based etching gas and optimizing electrode power, pressure intensity, etching gas composition, cavities, electrode temperature and other parameters, the dry-process etching of the HfSiAlON high-K material can be applied to the dry-process etching process for preparing a CMOS (Complementary Metal Oxide Semiconductor) device.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to a dry etching method for HfSiAlON high dielectric constant (K) medium. Background technique [0002] As the feature size of semiconductor devices enters the 45nm technology node, the leakage current of the silicon dioxide or silicon nitride gate dielectric increases significantly, so it is necessary to introduce a high-K material with a thicker physical thickness under the same equivalent oxide layer thickness. Reduce the gate leakage current and reduce the power consumption of the device. Among many high-K materials, hafnium (Hf)-based high-K materials are finally considered to be the most promising SiO 2 Alternatives to gate dielectrics. But HfO 2 Because the crystallization temperature of the high-K dielectric is lower than 600°C, part or all of the crystallization will diffuse into the fast channel of the gate dielectric or even the channel as oxyg...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/311
Inventor 李永亮徐秋霞
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI