Fractional-N frequency synthesizer

A technology of frequency synthesizer and fractional frequency division, applied in automatic power control, electrical components, etc., can solve the problem that the number of digits cannot be very high, achieve the effect of small amplitude, reduce interference, and improve the degree of suppression

Inactive Publication Date: 2012-02-01
UNIV OF ELECTRONIC SCI & TECH OF CHINA
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  • Abstract
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Problems solved by technology

[0005] Due to the limitation of integrated circuit capacity, the number of digits of the delta-sigma modulator in the existing commercial

Method used

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  • Fractional-N frequency synthesizer
  • Fractional-N frequency synthesizer
  • Fractional-N frequency synthesizer

Examples

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Embodiment Construction

[0020] Such as figure 1 As shown, a fractional frequency synthesizer includes a reference clock unit 10 with a built-in LVDS transceiver unit, an analog filter 80, a phase detection output converter 32 as an LVDS transceiver unit on the analog filter side, and a voltage controlled oscillator 21 and the VCO output unit of the resistance power divider 22, the VCO high-speed comparator 31 as the VCO output unit side LVDS transceiver unit, the control interface unit 90, and a built-in differential input global clock buffer unit (IBUFGDS) 61 of the reference clock unit side , including the reference signal frequency divider 51 and the reference signal frequency division output unit of the global clock buffer unit (BUFGCE) 62 with the clock enabling terminal, the phase detector 70, the differential output global clock buffer unit (OBUFGDS) of the phase detector side ) 66, a VCO frequency division output unit comprising the VCO frequency divider 52 and a BUFGCE63 on the VCO frequency...

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Abstract

The invention provides a fractional-N frequency synthesizer, which can effectively inhibit integer-N boundary spurs. A reference signal frequency division output unit, a VCO (voltage controlled oscillator) frequency division output unit, a Delta-Sigma modulator and a phase discriminator are integrated on an integrated circuit, so that the interference of external noises can be effectively reduced. An LVDS (low voltage differential signaling) wire input into the integrated circuit from a reference clock unit and an LVDS wire output from the integrated circuit by the phase discriminator form a 90-degree layout, and an LVDS wire output from the integrated circuit by the phase discriminator and an LVDS wire input into the integrated circuit from a VCO form a 90-degree layout, so that the probability of intermodulation between higher harmonics of a reference clock and the output frequency of the VCO can be maximally reduced, and the inhibition degree of the integer-N boundary spurs furthercan be decreased. Moreover, a reference clock signal and an output signal of the VCO are transmitted by adopting the LVDS wires, so that the amplitude of the transmitted signals is low, and even though the two signals are intermodulated, the power of intermodulation interference is low and almost can be neglected.

Description

technical field [0001] The invention relates to frequency synthesis technology, in particular to fractional frequency synthesis technology. Background technique [0002] In both wireless communication systems and electronic measurement and test systems, high-speed oscillating radio frequency signals are required to achieve modulation and demodulation. With the increasingly complex communication system and more and more wireless electromagnetic spectrum interference, the system puts forward higher requirements on the indicators of signal sources. The stability of the signal source, phase noise and frequency conversion time will directly affect the performance of the system. For example, in a radar system, the deterioration of the phase noise of the frequency source will directly lead to the decrease of the resolution of the target. At the same time, the uninterrupted fast scanning of the radar requires the frequency source to provide a high switching speed. How to provide ...

Claims

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Application Information

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IPC IPC(8): H03L7/18H03L7/099
Inventor 何松柏张渤海杜冰游飞
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA
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