Growth method of germanium substrate and germanium substrate

Abstract

The invention provides a growth method of a germanium substrate. The growth method comprises the following steps of: providing a supporting substrate, wherein the supporting substrate is a crystal material; epitaxially growing a first germanium crystal layer on the surface of the supporting substrate at a first temperature; and epitaxially growing a second germanium crystal layer on the surface of the first germanium crystal layer at a second temperature, wherein the first temperature is lower than the second temperature. The growth method has the advantages that: a growth process combining low and high-temperature germanium epitaxial growth is provided; firstly, a germanium layer is grown at a low temperature, thus the germanium layer has low epitaxial growth speed, has two-dimensional growth characteristics and is completely relaxed, and the thin low-temperature germanium layer has multiple defects and is easy for stress relaxing and dislocation annihilation; and then, a germanium epitaxial layer is grown at a high temperature, thus the germanium layer has high growth speed, and a single crystal germanium layer which has high crystal quality and is completely relaxed can be obtained.

Description

technical field [0001] The invention relates to a growth method of a germanium substrate and a germanium substrate, in particular to a growth method of a germanium substrate with high crystal quality and a germanium substrate. Background technique [0002] The chip manufacturing industry is still following Moore's Law and is developing in the direction of 450 mm large-size wafers, nanoscale lithography line width, high precision, high efficiency, and low cost. Since 2004, many top international semiconductor manufacturers have adopted the 90 nm process to produce integrated circuit IC chips. The launch of the 90 nm process marks that the chip manufacturing industry has entered the era of nanotechnology in the range of 100 nm to 0.1 nm. However, severe challenges have been encountered in further improving the integration level and operating speed of chips and reducing the feature size of integrated circuits. The existing materials and processes are approaching their physical ...

AI Technical Summary

Problems solved by technology

However, due to the large lattice mismatch between silicon and germanium, the epitaxial single crystal germanium layer has a large dislocation density and its crystal quality is poor

In addition, due to the lattice mismatch between Si and Ge, the Ge layer obtained by coherent growth should be a strained Ge layer, and a relaxed Ge single crystal layer cannot be obtained.

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