Digital controllable annular voltage-controlled oscillator circuit

Abstract

The invention relates to a digital controllable annular voltage-controlled oscillator circuit. The current product has low quality factor and poor phase noise. The circuit comprises a multistage delay unit, and each stage includes four NMOS (N-channel Metal Oxide Semiconductor) tubes, four PMOS (P-channel Metal Oxide Semiconductor) tubes and a switch capacitor array; a plurality of switch units are connected in parallel to form a switch capacitor array, and the switch capacitor is a three-dimensional interdigital capacitor; the first same-phase input end of the middle stage delay unit is connected with the reverse phase output end of the previous stage and the second same-phase input end of the next stage, the first reverse phase input end of the middle stage delay unit is connected with the same-phase output end of the previous stage and the second reverse phase input end of the next stage, the second same-phase input end of the middle stage delay unit is connected with the first same-phase input end of the previous stage, the second reverse phase input end of the middle stage delay unit is connected with the first reverse phase input end of the previous stage, the reverse phase output end of the middle stage delay unit is connected with the first same-phase input end of the next stage, the same-phase output end of the middle stage delay unit is connected with the first reverse phase input end of the next stage, and the first stage delay unit is reversely connected with the last stage delay unit. The digital controllable annular voltage-controlled oscillator circuit increases the oscillating frequency, reduces the phase noise and has the advantages of high capacitor density and compatibility with digital technology.

Description

technical field [0001] The invention belongs to the technical field of microelectronics and relates to a digital controllable ring voltage-controlled oscillator circuit. Background technique [0002] With the rapid development of integrated circuit technology, the operating speed of microprocessors is getting higher and higher, so corresponding circuits are required to generate high-performance clock signals. Usually an active or passive crystal oscillator is used to generate a stable clock signal, but the frequency of the output signal is low. Therefore, the frequency multiplication effect of the phase-locked loop is usually used to generate a high-frequency clock signal. [0003] Commonly used phase-locked loops for generating clocks include analog phase-locked loops and digital phase-locked loops. Digital phase-locked loops are mainly limited by the working speed; at the same time, they also have disadvantages in terms of chip power consumption and the number of pins. ...

AI Technical Summary

Problems solved by technology

The ring oscillator has the advantages of good process compatibility, wide tuning range and multi-phase output, but due to the low quality factor of the loop, the phase noise is poor

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