Manufacturing method of multilayer metal-multilayer insulator-metal capacitor
A multi-layer insulator, metal capacitor technology, applied in the field of capacitors, can solve problems such as reducing the performance of metal-insulator-metal MOM capacitors, and achieve the effect of meeting requirements and improving stability
Inactive Publication Date: 2012-08-15
SHANGHAI HUALI MICROELECTRONICS CORP
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[0034] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments. The specific embodiments described here are only used to explain the present invention, and are not used to limit the protection scope of the present invention.
[0035] The manufacturing method of the multilayer metal-multilayer insulator-metal capacitor of the present invention is carried out on the silicon substrate 100, specifically, refer to Figure 1 to Figure 5 , first perform step 1 to make a multilayer insulator 2, the multilayer insulator 2 includes several layers of high-K value silicon oxide films 21, and a layer of high-K value silicon nitride is sandwiched between two adjacent high-K value silicon oxide films 21 Film 22, such as figure 1 Shown; Step 2, etch and remove part of the multilayer insulator 2 to obtain figure 2 The remaining multi-layer insulator 2 located in the capacitor region; step 3, depositing a low-k v...
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The invention discloses a manufacturing method of a multilayer metal-multilayer insulator-metal capacitor. The method is executed on a silicon substrate, and comprises the following circularly executed steps of: step 1, manufacturing a multilayer insulator, wherein the multilayer insulator comprises multiple layers of high-K value silicon oxide films, and a high-K value silicon nitride film is sandwiched between two neighboring high-K value silicon oxide films; step 2, etching to remove part of the multilayer insulator; step 3, depositing a low-k value dielectric layer for covering the multilayer insulator remained in the step 2; step 4, performing chemical mechanical polishing on the upper surface of the low-k value dielectric layer; step 5, manufacturing through holes in the low-k value dielectric layer vertically over the multilayer insulator, and manufacturing a metal groove in a region at which the low-k value dielectric layer and the multilayer insulator are not superposed in a vertical direction, wherein the bottoms of the through holes are contacted with the upper surface of the multilayer insulator; step 6, filling the through holes and the metal groove with metal, and then, performing chemical mechanical polishing so as to improve the performance of the capacitor.
Description
technical field [0001] The invention relates to a capacitor, in particular to a method for manufacturing a multilayer metal-multilayer insulator-metal capacitor. Background technique [0002] Capacitors are important components in integrated circuits and are widely used in memory, microwave, radio frequency, smart card, high voltage and filter chips. A widely used capacitor configuration in chips is metal-insulator-metal (MIM) parallel to the silicon substrate. Among them, the metal is copper, aluminum, etc., whose manufacturing process is easily compatible with the metal interconnection process, and the insulator is a dielectric material with a high dielectric constant (k) such as silicon nitride and silicon oxide. Improving the properties of high-k dielectric materials is one of the main methods to improve capacitor performance. [0003] Plasma Enhanced Chemical Vapor Deposition (PECVD, Plasma Enhanced Chemical Vapor Deposition) is widely used for thin film deposition in...
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IPC IPC(8): H01L21/334
Inventor 毛智彪胡友存徐强
Owner SHANGHAI HUALI MICROELECTRONICS CORP