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Method for preparing high-efficiency heterojunction cells

A heterojunction cell, high-efficiency technology, used in circuits, electrical components, final product manufacturing, etc., can solve problems such as surface contamination, and achieve the effect of reducing reflection loss

Active Publication Date: 2012-11-14
TRINASOLAR CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] In response to the above-mentioned needs of the industry, the present invention aims to propose a set of simple and feasible process methods for preparing ultra-low reflectivity nanowire-shaped textured structures through wet chemical paths, and to solve the application of the textured structure in The surface pollution problem that exists in heterojunction solar cells, so as to combine the preparation of textured surfaces to illustrate the production process of such cells

Method used

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  • Method for preparing high-efficiency heterojunction cells
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  • Method for preparing high-efficiency heterojunction cells

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Embodiment Construction

[0033] Embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0034] figure 2 A flowchart schematically showing the main steps of the method for preparing a high-efficiency heterojunction battery according to the present invention. The structure of the high-efficiency heterojunction cell is, for example, image 3 shown.

[0035] refer to figure 2 ,, the main steps of the preparation method 200 of the high-efficiency heterojunction battery of the present invention include: step 201: cleaning the silicon wafer; step 202: polishing the two surfaces of the silicon wafer, so that the two surfaces Obtain the polished topography; Step 203: Attach the mask for single-sided texturing that is resistant to chemical liquid corrosion and penetration on one of the two surfaces that have been polished; Step 204: Apply the mask to the silicon with mask The sheet is prepared with a nanowire structure, so that the exposed surfac...

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Abstract

The invention provides a method for preparing a high-efficiency heterojunction cell. The method comprises the following steps of: cleaning a silicon slice; performing polishing treatment on the two surfaces of the silicon slice so as to obtain the polished morphology of the two surfaces; attaching a mask for single-face texture surface making and preventing chemical liquid corrosion and permeation to one of the two surfaces polished previously; performing the preparation of a wet-process chemical nano-line structure on the silicon slice with the mask so as to obtain the textured surface structure of a nano-line array structure on one polished surface while keeping the previous polished shape of the other mask attached protected surface; performing pre-treatment before washing on the obtained nano-line structure; performing micro-corrosion cleaning treatment on the textured surface through reactive-ion dry etching; selecting an appropriate chemical cleaning fluid so as to further remove silver particles left on the surface of the silicon slice; removing the mask and then performing targeting post-cleaning treatment on the silicon slice with the nano-line structure; and starting the preparation of the heterojunction solar cell on the silicon slice cleaned already. The method provided by the invention can greatly reduce the reflection loss of the surface of the cell in light absorption and solves the cleaning problems caused by the textured surface structure, the impurity silver particles and the like.

Description

technical field [0001] The invention relates to the field of manufacturing high-efficiency solar cells using crystalline silicon materials as substrates, in particular to a method for preparing high-efficiency heterojunction cells. Background technique [0002] At present, various high-efficiency photoelectric conversion devices based on P-type or N-type substrates are emerging, especially heterojunction cells (HIT) constructed with hydrogenated amorphous silicon and single crystal silicon substrates due to their excellent photoelectric conversion Efficiency has attracted much research attention. [0003] Compared with the traditional high-temperature diffusion junction solar cell, this cell structure has the following three main features: First, the P-N heterostructure involved in the HIT cell, its back electric field, and the carrier-collecting electrode can all be controlled at temperatures below 200°C. Therefore, due to the low temperature process requirements, its ther...

Claims

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Application Information

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IPC IPC(8): H01L31/20
CPCY02P70/50
Inventor 王栋良
Owner TRINASOLAR CO LTD
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