Boundary scan test controller for mixed signal circuit

Abstract

The invention provides a boundary scan test controller for a mixed signal circuit. The boundary scan test controller comprises a host module, as well as a counting module, a command module, a test clock frequency divider, a general register set, an analog register set, a serial scanning module and an analog instrument platform control module which are connected with the host module through read-write data buses, and is equipped with a processor interface and test bus interfaces, wherein the analog instrument platform control module is equipped with a mixed signal control interface connected with both a program-controlled signal source generating a voltage/current excitation signal and a voltage collector collecting a response signal of a tested circuit; the processor interface of the host module is connected with a microprocessor; the serial scanning module is equipped with two sets of test bus interfaces; and the mixed signal control interface is an SPI (Serial Peripheral Interface) and is connected with the analog instrument platform. The controller provided by the invention facilitates assembling a boundary scan test system of the mixed signal circuit for performing digital/analog boundary scan tests, and solves the problem of synchronization of digital vector application, analog test excitation application and voltage acquisition.

Description

technical field [0001] The invention relates to the technical field of integrated circuit testing, in particular to a mixed-signal circuit boundary-scan testing controller. Background technique [0002] With the advancement of semiconductor technology and the improvement of integrated circuit design technology, the scale of integrated transistors in chips has been growing exponentially in accordance with Moore's Law. level chip (SOC) era. The high integration of the chip and the high-density assembly of the printed board make the external contactable pins of the integrated circuit chip less and less, and the difficulty of testing becomes more and more difficult. The cost of testing the chip is even higher than the cost of the design and production of the chip itself. , Chip testing has become a bottleneck restricting chip development. [0003] At present, in the fault diagnosis of board-level circuits, the main method of applying or obtaining signals is contact diagnosis, ...

AI Technical Summary

Problems solved by technology

This test method, because the boundary scan test controller cannot directly control the analog instrument platform, it is difficult to deal wit

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