Task scheduling method and device based on multi-core system

A technology of task scheduling and scheduling algorithm, applied in multi-programming devices, program startup/switching, resource allocation, etc., can solve problems such as inability to achieve, achieve efficient scheduling, improve microprocessor resources, and improve throughput.

Inactive Publication Date: 2012-12-19
SHANGHAI JIAO TONG UNIV
View PDF3 Cites 42 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

On the other hand, for online reconfigurability, for a single task, the existing task scheduling technology ca

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Task scheduling method and device based on multi-core system
  • Task scheduling method and device based on multi-core system
  • Task scheduling method and device based on multi-core system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0041] The embodiment of the present invention provides a task scheduling method and device based on a many-core system. By dividing the microprocessor many-core system into a management scheduling area and a task execution area, the scheduling algorithm and compilation The command command generates compilation information, and the scheduling unit receives the compilation information and schedules the threads that need to be scheduled to the appropriate PE, builds a computing mode that meets the requirements, and forms a suitable virtual computing group VCG by configuring the subnet; the task execution area is under the scheduling of the scheduling unit Make a response strategy, and then realize dynamic and online reconfiguration. This solution can improve the microprocessor resources of the many-core platform, efficiently schedule task sets, optimize system performance, and improve the throughput of the streamlined many-core system.

[0042] In order to make the object, techni...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides task scheduling method and device based on a multi-core system. A microprocessor multi-core system is divided into a management scheduling region and a task execution region. Compilation information is generated by scheduling algorithm and compilation instructions according to different applications and current system resources. A scheduling unit receives the compilation information and schedules a thread to be scheduled to a proper PE (processor element), a satisfactory calculation mode is built, and a proper VCG (virtual computing group) is formed by configuring a subnet. The task execution region takes countermeasures under scheduling of the scheduling unit so as to achieve dynamic online reconfiguration. By the method and the device, utilization rate of microprocessor resources of multi-core platforms can be increased, task sets are scheduled effectively, system performance is optimized, and throughput rate of simplified multi-core systems is increased.

Description

technical field [0001] The invention relates to the technical field of computer task scheduling and resource mapping, in particular to a task scheduling method and device based on many-core systems. Background technique [0002] At present, the development of microprocessor micro-architecture has the following four important trends: First, the system structure of single-chip integration. Using SoC (System On Chip) technology to realize the miniaturization and integration of traditional computer systems in a single chip is an important trend in the research and design of microprocessors. A single chip multiprocessor CMP (Chip Multiprocessor) is formed by integrating multiple processor cores, inter-core interconnection networks, and on-chip multi-level storage levels in a single chip. With the continuous expansion of chip scale, the future trend is to integrate larger-scale MPP systems (the number of nodes to hundreds of orders of magnitude, or even more) into a single chip t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): G06F9/48G06F9/50
Inventor 付宇卓刘子杨蒋江刘婷
Owner SHANGHAI JIAO TONG UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap