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Wafer level LED packaging structure

A LED packaging, wafer-level technology, applied in the direction of electrical components, circuits, semiconductor devices, etc., can solve the problems of high packaging cost, restricted effective area for heat dissipation, and difficult process, so as to improve the conduction and heat dissipation capabilities, packaging The effect of simple structure and cost reduction

Active Publication Date: 2014-12-10
JIANGYIN CHANGDIAN ADVANCED PACKAGING CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] With the deepening of people's understanding of wire bonding LED packaging, the LED packaging technology with wafer as the carrier has begun to develop, but in the current technological development, Wafer-level LED packaging basically adopts the Through Silicon Via (TSV) interconnection method, and uses the TSV (Through Silicon Via) structure to realize the backside transfer and distribution of LED electrodes. The process is difficult, the packaging cost is high, and the effective area for heat dissipation Bound

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  • Wafer level LED packaging structure
  • Wafer level LED packaging structure

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Embodiment Construction

[0044] see figure 1 , a wafer-level LED package structure according to the present invention. In Embodiment 1, the package structure includes an LED chip 1, a silicon-based carrier 2 and a filling glue 4. The LED chip 1 includes a chip body 11, and on the chip body 11 An electrode 12 is provided on the surface, and the electrode 12 includes an electrode I 121 and an electrode II 122 , and the glass 3 is arranged on the silicon-based carrier 2 .

[0045] The front side of the silicon-based carrier 2 is provided with a concave cavity 21, and the back side is provided with a silicon island 22. The longitudinal section of the cavity 21 is an inverted trapezoid. The silicon island 22 straddles both ends of the cavity 21 and bridges the bottom of the cavity 21 . The silicon island 22 plays the role of supporting the chip. The LED chip 1 in the cavity 21 is connected to the silicon island 22 through the bonding glue 13 , the length of the silicon island 22 is larger than the botto...

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Abstract

The invention relates to a wafer level LED packaging structure which comprises the technical field of semiconductor chip packaging and comprises an LED chip (1), a silicon base carrier (2), glass (3), a filling glue (4), a reflection layer (5), a photosensitive resin layer (6) and a metal layer, wherein a concave cavity (21) concaved in the right side of the silicon base carrier (2) is internally provided with an LED chip (1), a silicon island (22) is formed on the back surface of the silicon base carrier and is stridden with the cavity (21), a photosensitive resin layer I (61) with an island structure is covered on the lower surface of the silicon base carrier (2), a metal block (72) is arranged on the lower surface of the silicon island (22), a rewiring metal layer (71) is connected with an electrode I ( 121) and an electrode II (122), and a signal and heat of the LED chip are led outside. Due to the adoption of a non-TSV (Through Silicon Via) structure, the wafer level LED packaging structure has the advantages of low packaging process difficulty and low packaging cost, is improved in electricity conduction and heat radiating capacity, and is suitable for being widely applied in portable products.

Description

technical field [0001] The invention relates to a wafer-level chip packaging structure, which belongs to the technical field of semiconductor chip packaging. Background technique [0002] LED (Light Emitting Diode) is a solid-state semiconductor device that can convert electrical energy into visible light. It is widely used in lighting, liquid crystal backlight panels, control panels, flash devices and other fields. [0003] LEDs (Light Emitting Diodes) consist of P-N junctions. At present, LED packaging is mainly carried out by bonding a single chip (that is, wire bonding) and flip-chip bonding, which has the following shortcomings: [0004] 1) Wire-bonded package [0005] The position of the lead will cover and lose the light intensity. The heat dissipation base of the wire-bonding package is on the back of the chip, and the heat dissipation effect is not ideal. Especially for high-brightness LEDs, the package size of the wire-bonding package is relatively large. Not co...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L33/56H01L33/62H01L33/64
Inventor 张黎陈栋赖志明陈锦辉
Owner JIANGYIN CHANGDIAN ADVANCED PACKAGING CO LTD