MOSFET (metal oxide semiconductor field effect transistor) and manufacturing method thereof

Abstract

Provided are a MOSFET and a manufacturing method therefor. The MOSFET comprises: a semiconductor substrate, a first buried insulating layer on the semiconductor substrate, a backgate formed within a first semiconductor layer on the first buried insulating layer, a second buried insulating layer on the first semiconductor layer, source / drain regions formed within a second semiconductor layer on the second buried insulating layer, a gate on the second semiconductor layer, and an electrical connection of the source / drain regions, the gate, and the backgate. The backgate is only arranged below one in the source / drain regions and below a channel region, and not below the other in the source / drain regions. The electrical connection comprises a public conductive channel of the backgate and of the one in the source / drain regions. The MOSFET uses asymmetric backgate to improve the suppression of a short-channel effect, and uses the public conductive channel to reduce chip footprint.

Description

technical field [0001] The present invention relates to a MOSFET and a manufacturing method thereof, more particularly, to a MOSFET with a back gate and a manufacturing method thereof. Background technique [0002] An important development direction of integrated circuit technology is to scale down the size of metal-oxide-semiconductor field-effect transistors (MOSFETs) to improve integration and reduce manufacturing costs. However, it is well known that short-channel effects occur as the size of MOSFETs decreases. As the size of the MOSFET is scaled down, the effective length of the gate is reduced, so that the proportion of depletion layer charge that is actually controlled by the gate voltage is reduced, so that the threshold voltage decreases as the channel length decreases. [0003] Yan et al. proposed in "Scaling the Si MOSFET: From bulk to SOI to bulk" (IEEE Trans. Elect. Dev., Vol. 39, p. 1704, July 1992), in SOI MOSFET, by A ground plane (that is, a grounded back ...

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Problems solved by technology

[0004] However, the above-mentioned SOI MOSFET with a back gate must be grounded or biased at a predetermined potential during operation, thus requiring additional chip area for providing an electrical contact to the back gate, for example for forming additional channels and wiring

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