Dual-stress thin film preparation method and semiconductor device
A manufacturing method and dual-stress technology, applied in semiconductor/solid-state device manufacturing, transistors, electrical components, etc., can solve problems such as exposure efficiency drop, yield loss, affecting final stress target value and uniformity, etc., to avoid overlap Area problem, effect of preventing loss of yield rate
Inactive Publication Date: 2013-02-13
SHANGHAI HUALI MICROELECTRONICS CORP
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Problems solved by technology
[0006] The invention provides a method for manufacturing a dual stress film, which avoids the risk of exposure efficiency reduction caused by photoresist failure in the subsequent photolithography process, thereby affecting the final stress target value and uniformity, and avoids the risk of traditional dual stress film (Dual Stress The problem of overlapping areas in Liner) process, so as to solve the problem of yield loss caused by overlapping areas
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[0026] Although the invention will be described in more detail below with reference to the accompanying drawings, in which preferred embodiments of the invention are shown, it should be understood that those skilled in the art can modify the invention described herein and still achieve the advantageous effects of the invention. Therefore, the following description should be understood as a broad instruction for those skilled in the art, rather than as a limitation of the present invention.
[0027] In the interest of clarity, not all features of an actual implementation are described. In the following description, well-known functions and constructions are not described in detail since they would obscure the invention with unnecessary detail. It should be appreciated that in the development of any actual embodiment, numerous implementation details must be worked out to achieve the developer's specific goals, such as changing from one embodiment to another in accordance with sy...
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Abstract
The invention discloses a dual-stress thin film preparation method and a semiconductor device. A nitrogenous silicon carbide thin film is covered by a layer of a non-nitrogenous silicon carbide thin film. The non-nitrogenous silicon carbide thin film can prevent free nitrogen in the nitrogenous silicon carbide thin film from polluting a light resistance layer, avoids reduction of exposure efficiency due to invalidation of light resistance in follow-up photoetching process, and therefore influences final stress target values and risks of uniformity. Meanwhile, ultraviolet (UV) light is utilized to irradiate a silicon carbide thin film so that stress of the silicon carbide thin film converts from pressure stress to tensile stress after being irradiated by the UV light. The problem that a dual-stress thin film of a silicon nitride thin film can not meet resistance-capacitance (RC) delay requirements of a plurality of advanced devices is solved. The overlapping area problem of traditional dual-stress thin film process is avoided. Therefore, the yield loss problem caused by overlapping areas is solved and the process is simple and easy to operate.
Description
technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a method for manufacturing a double stress film and a semiconductor device. Background technique [0002] With the development of CMOS semiconductor device technology and proportional size reduction, stress engineering plays an increasingly important role in semiconductor technology and device performance; the introduction of stress in CMOS devices is mainly to improve the carrier mobility of the device. Tensile stress in the channel direction (longitudinal) of CMOS devices is beneficial to NMOS electron mobility, while compressive stress is beneficial to PMOS hole mobility, and tensile stress in the channel width direction (transverse) is beneficial to the carriers of NMOS and PMOS devices. The mobility is beneficial, and the compressive stress in the vertical channel plane direction (out-of-plane) is beneficial to the electron mobility of the NMOS device, and the...
Claims
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Login to View More IPC IPC(8): H01L21/8238H01L21/314H01L21/3105H01L27/092
Inventor 张文广陈玉文
Owner SHANGHAI HUALI MICROELECTRONICS CORP