Method for calculating thermal fatigue failure probability of welding point of integrated circuit chip

Abstract

The invention provides a method for calculating thermal fatigue failure probability of a welding point of an integrated circuit chip. The method comprises the steps of: (1) determining the influence parameters of thermal fatigue failure probability of the welding point of the integrated circuit chip; (2) generating n groups of influence parameters randomly in normal distribution and calculating the maximum equivalent thermal stress corresponding to each group of influence parameters through a finite element numerical value; (3) normalizing the n groups of influence parameters; (4) obtaining a strong-nonlinear relation between the influence parameters and the thermal stress; (5) establishing a thermal fatigue strength model of a variable welding material when the chip is dynamic; and (6) calculating the thermal fatigue failure probability of the welding point of the chip by a CRS (Central Reservation System) method. The method provided by the invention solves the problem that the thermal fatigue failure and thermal fatigue reliability are more difficult to calculate than to establish the mould. The method is quick in speed, and simple and convenient and accessible, and provides a novel path for design of the thermal fatigue failure and thermal fatigue reliability of the welding point of the integrated circuit chip.

Description

Technical field [0001] The invention belongs to the field of electronic system integrated circuits, and in particular relates to a method for calculating the thermal fatigue failure probability of an integrated circuit chip solder joint. Background technique [0002] In the electronic system integrated circuit, the chip is directly soldered to the surface of the PCB or ceramic substrate, and the electrical and mechanical connection between the device and the circuit board is realized through solder joints. With the improvement of chip integration and the complexity of the working environment, its heating density is getting higher and higher, and the overheating of integrated circuits has become the main reason for the failure of electronic systems. Under the action of random and asymmetric cyclic thermal loads, the fatigue damage of the solder joints of the integrated circuit chip gradually accumulates. When the cumulative damage reaches a certain value, the structure will underg...

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Problems solved by technology

[0003] However, chip fatigue damage generally undergoes a complex dynamic physical process of localized high plasticity zones in the material, short crack initiation, short crack propagation, long crack propagation, and failure. The thermal stress generated inside the solder joint is related to the external environment, thermal load, chip and substrate. There is a complex relationship between geometric dimensions and material properties, which is difficult to describe with a fixed mathematical model, and the strength of solder is also a dynamic time-varying process, and its strength will gradually increase under the action of stress as the use time increases. Degradation, there is a complex and strong nonlinear relationship between it and the initial strength of the solder, the average temperature of the work, the amplitude of the temperature cycle and the number of thermal loads. It is difficult to obtain it by traditional fatigue tests. It is applied in the estimation of the mechanical field Models such as Gerber, Goodman, Soderberg, CepeHceH, Morrow and DING's models are difficult to fit the thermal fatigue reliability calculation and design of integrated circuit chip solder joints with dynamic time-varying strong nonlinearity

The above reasons make it very difficult to calculate the quantitative thermal fatigue failure probability and thermal fatigue reliability of integrated circuit chip solder joints. At present, some qualitative predictions are mainly based on experience. Some scholars have proposed some theories and methods such as Schaff’s remaining The intensity model, the boundary integral method proposed by LuisAntBnio and Waak Bambace of the Institute of Space Research of the National Institute of Brazil, and the numerical method of thermal convection at the interface proposed by Ma Yidong of the School of Mechanical Engineering of Portland State University, etc., all of them use a single and deterministic models cannot fundamentally meet the requirements of thermal fatigue reliability design and calculation of integrated circuit chip solder joints

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