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Process for manufacturing thin film transistor

A thin film transistor and preparation process technology, applied in the field of metal oxide TFT preparation, can solve the problems of low field effect mobility and unsuitable for industrial production, etc.

Inactive Publication Date: 2013-04-03
QINGDAO SHENGJIA INFORMATION TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In addition to the more representative results described above, there are many reports on TFTs and nanowire channel TFTs fabricated by chemical coating methods and inkjet printing methods, but due to the generally low field-effect mobility of these devices or It is not suitable for industrial production, so there is not much research done here

Method used

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Embodiment Construction

[0015] The preparation process of the electric double layer ITO thin film transistor with bottom gate structure of the present invention comprises:

[0016] cleaning substrate step;

[0017] In the step of preparing the grid, ultrasonic cleaning is performed with acetone and ethanol for 10 minutes to remove organic matter and oil stains on the silicon wafer, and then the acetone and ethanol remaining on the silicon wafer are cleaned with deionized water, and finally dried in an oven at 80°C tumble dry. The silicon chip used in the present invention has better conductivity and can be used as a grid.

[0018] In the step of preparing the insulating layer, put the processed silicon wafer into the vacuum chamber of PECVD, use a mechanical pump and a Roots pump to pump the pressure of the vacuum chamber to below 10Pa, and the reactive gases introduced are oxygen and silane, and the inert gas is introduced at the same time Argon was used as shielding gas as well as ionization gas....

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Abstract

A process for manufacturing an ITO (indium tin oxide) thin film transistor with a bottom grid structure and double electric layers includes a substrate cleaning step, a grid electrode manufacturing step, an insulating layer manufacturing step, an ITO channel layer depositing step and a source and drain electrode manufacturing step. The insulating layer manufacturing step, the ITO channel layer depositing step and the source and drain electrode manufacturing step are carried out at the room temperature.

Description

technical field [0001] The invention relates to the preparation process of metal oxide TFT, especially the preparation process of TFT at full room temperature. Background technique [0002] In recent years, more and more groups have shown great interest in TFTs prepared at full room temperature. Since 2005, Fortunato et al. have prepared a TTFT device with good performance at full room temperature, with a saturation mobility of 27cm2 / Vs, a threshold voltage of 19V, and an on-off ratio greater than 105. The performance of the device prepared at full room temperature has improved. Ideally, the threshold voltage needs to be optimized. [0003] For improving the performance of the device, using amorphous oxide as the channel layer is also a method. Since the amorphous thin film has less grain boundary scattering than the polycrystalline thin film, the carrier mobility of the channel layer can be improved. Hsieh et al. reduced the thickness of the ZnO film (from 60nm to 10nm) ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336
Inventor 刘雷秦子玲于正友
Owner QINGDAO SHENGJIA INFORMATION TECH