Digital picture contour extraction method

Abstract

The invention provides a digital picture contour extraction method and relates to a digital image processing technique. The method includes the first step of observing a divided image and initiating a curve, the second step of initiating a speed evolvement function and obtaining a speed evolvement image V, the third step of carrying out expansive working on the initiated binary image A obtained from the first step to obtain an image E through expansion, and taking B as a value of a 3*3 structural element, the fourth step of updating a level set function, namely updating the binary image A, and the fifth step of returning to the third step and continuing operation. According to the characteristics of field programmable gate array (FPGA), the contour extraction method based on a form level set is put forward, and floating point arithmetic and parallel calculation for each pixel are needless; the Handel-C language which is quicker and more efficient than a traditional hardware description language is adopted; and circuits with modified structures are adopted in Dilation and Erosion submodules in an image processing submodule, the image is scanned once and image effects of the whole template operation can be obtained.

Description

technical field [0001] The invention relates to a digital image processing technology, in particular to a digital image contour extraction method based on a morphological level set which is suitable for parallel implementation on FPGA. Background technique [0002] Contour extraction from digital images usually requires a lot of data calculations. Although the calculation speed of the CPU is getting faster and faster, it is often inefficient when faced with complex processing algorithms or high-resolution images. [0003] In modern digital circuit design, FPGA is playing an increasingly important role. Including simple interface circuit design, state machine and SoC design, the role played by FPGA cannot be ignored. As a device widely used in electronic design automation tool design, FPGA has been widely used in image processing systems. [0004] Among many image contour extraction algorithms, the segmentation method or active contour model based on energy functional is t...

AI Technical Summary

Problems solved by technology

However, using VHDL and Verilog HDL language for development requires a very good understanding of hardware details, which will limit the use of FPGA to a certain extent

Moreover, for more complex algorithms such as image, voice, radar, software radio, etc., if the code is written in hardware description language, it will be very time-consuming and error-prone

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