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A Successive Approximation Analog-to-Digital Converter

An analog-to-digital converter, successive approximation technology, applied in analog-to-digital conversion, code conversion, instruments, etc., can solve the problem of slow conversion speed of analog-to-digital converter, and achieve the effect of shortening logic delay and improving conversion speed

Inactive Publication Date: 2015-12-02
UNIV OF SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The technical problem to be solved by the present invention is: to overcome the problem of slow conversion speed of traditional successive approximation analog-to-digital converters, to provide a high-speed self-locking register for analog-to-digital converters, which can greatly reduce the output from comparator output comparison results to The delay of the digital-to-analog converter operation significantly improves the conversion rate of the analog-to-digital converter

Method used

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  • A Successive Approximation Analog-to-Digital Converter
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  • A Successive Approximation Analog-to-Digital Converter

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Embodiment Construction

[0043] Such as Figure 1-6 As shown, the circuit of the present invention has the following changes relative to the traditional scheme: the first is to transform the D flip-flop in the traditional data register into image 3 The dynamic circuit 235 is shown inside the dashed circle. Different from the traditional D flip-flop with only one clock input, the new dynamic circuit (hereinafter referred to as the new data register unit) includes two clock input terminals: the first clock input terminal Ck i and the second clock input Ck i+1 , where Ck i coupled to the output 142-i of the ith shift register unit, Ck i+1 is coupled to the output 142-i+1 of the i+1 shift register unit.

[0044]The new data storage unit 235 includes a first transistor 300, a second transistor 330, a third transistor 320, and a fourth transistor 325; a short circuit capacitor 315, a self-locking switch 335, a first inverter 305, a second inverter 310, third inverter. The source terminal of the first...

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Abstract

The invention discloses a successive approximation type analog-digital converter. The successive approximation type analog-digital converter comprises a digital-analog converter, a comparator, a successive approximation logical circuit and a clock source, wherein the successive approximation logical circuit comprises a shifting register and a data register, and a unit of the data register comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a first electric potential, a second electric potential, a short circuit capacitor, a self-locking switch, a first phase inverter, a second phase inverter and a third phase inverter. The successive approximation type analog-digital converter largely reduces the delay of the motion that a comparative result is output from the comparator to the digital-analog converter, thereby obviously improving the conversion efficiency of the analog-digital converter.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to an analog-to-digital converter, in particular to a successive approximation analog-to-digital converter. Background technique [0002] figure 1 A conventional successive approximation analog-to-digital converter is shown, which includes a digital-to-analog converter 100, a comparator 105, and a successive approximation logic circuit 110. Wherein, the successive approximation logic circuit 110 is composed of a shift register 120 and a data register 115 . The shift register 120 is an array composed of several shift register units 140-1 to 140-n, and each shift register unit has a data input terminal D, an output terminal Q, and a clock input terminal Ck; wherein, The data input end of any shift register unit 140-i is coupled to the output end of the upper stage 140-(i-1), and the data input end of the first shift register unit is coupled to the input end o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/38
Inventor 贺林吕伟杨家琪罗多纳杨灿美林福江
Owner UNIV OF SCI & TECH OF CHINA