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Integrated wafer-level vacuum packaged MEMS device and manufacturing method thereof

A device manufacturing method and vacuum packaging technology, which are applied in the direction of electric solid devices, semiconductor devices, manufacturing microstructure devices, etc., can solve the problems of reducing the manufacturing cost of MEMS devices, achieve reduced energy consumption, high-quality MEMS device manufacturing processes, and reduce Effect of Residual Stress Effect

Active Publication Date: 2013-10-16
GUANGDONG HEWEI INTEGRATED CIRCUIT TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to propose a MEMS device integrated in wafer-level vacuum packaging and its manufacturing method, to solve the problem of substrate stress in the MEMS device and reduce the manufacturing cost of the MEMS device

Method used

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  • Integrated wafer-level vacuum packaged MEMS device and manufacturing method thereof
  • Integrated wafer-level vacuum packaged MEMS device and manufacturing method thereof
  • Integrated wafer-level vacuum packaged MEMS device and manufacturing method thereof

Examples

Experimental program
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no. 1 example

[0054] figure 1 It is a flow chart of the method for manufacturing a MEMS device integrated in wafer-level vacuum packaging according to the first embodiment of the present invention, Figures 2A-2P is a process flow diagram of the manufacturing method of the first embodiment of the present invention. Such as figure 1 As shown, the manufacturing method includes:

[0055] Step 101, forming a MEMS structure on a single crystal silicon wafer substrate. Described step 101 comprises three sub-steps:

[0056] Step 101A, forming a mask layer on the single crystal silicon wafer substrate.

[0057] Such as Figure 2A As shown, a mask layer 202 is deposited on a single crystal silicon wafer substrate 201, the mask layer 202 can be thermally grown silicon oxide, low pressure chemical vapor deposition (LPCVD) silicon oxide Or plasma chemical vapor deposition (PECVD) silicon oxide.

[0058] Crystallographic orientations refer to the columns of atoms in different directions through ...

no. 2 example

[0103] Figures 3A-3C It is a process flow chart of the manufacturing method of the second embodiment of the present invention. The process flow of the second embodiment of the present invention is exactly the same as the process of step 101 to step 108 in the first embodiment, and will not be repeated here. On the basis of step 108, continue the process of the first embodiment of the present invention. The technical process of three embodiments, including:

[0104] Step 109', forming a sealing structure on the covering layer, and an opening structure for metal contact is formed on the sealing structure. The step 109' includes two sub-steps:

[0105] Step 109'A, forming a sealing layer on the covering layer, patterning the covering layer and sealing layer to form an opening structure, wherein the opening structure is aligned with the unremoved second sacrificial layer and third sacrificial layer .

[0106] Such as Figure 3A As shown, a sealing layer 212 is formed on the ...

no. 3 example

[0116] Figure 4 It is a schematic structural diagram of the integrated wafer-level vacuum packaged MEMS device according to the third embodiment of the present invention, wherein the MEMS device is manufactured by using the process flow of the first embodiment of the present invention. Such as Figure 4 As shown, the device includes:

[0117] A single crystal silicon wafer substrate 41 .

[0118] The MEMS structure 42 formed by etching the single crystal silicon wafer substrate 41 .

[0119] The electrode layer 43 disposed on the MEMS structure 42 is used to control the MEMS structure 42 .

[0120] The cover layer 44 arranged above the electrode layer 43, the first cavity formed between the cover layer 44 and the MEMS structure 42 and the first cavity formed between the MEMS structure 42 and the single crystal silicon wafer substrate The second cavity between the bottom 41, wherein the cover layer 44 is electrically connected to the electrode layer 43, and an opening stru...

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Abstract

The invention discloses an integrated wafer-level vacuum packaged MEMS device and a manufacturing method thereof. The manufacturing method comprises the following steps: forming an MEMS structure on a monocrystalline silicon wafer substrate; forming a first sacrificial layer on the MEMS structure; forming a patterned electrode layer on the first sacrificial layer; forming a second sacrificial layer on the electrode layer; forming a sealed cavity on the monocrystalline silicon wafer substrate located below the MEMS structure and sealing the cavity with a third sacrificial layer; allowing the second and third sacrificial layers to be patterned; forming a cover layer on the third sacrificial layer; allowing the cover layer to be patterned and removing the first, second and third sacrificial layers to enable the MEMS structure to be released; forming a sealing structure on the cover layer; forming a metal lead wire on the sealing structure; and carrying out low temperature annealing. According to the invention, the MEMS structure is a monocrystalline silicon material and is anchored on the upper part of a packaging structure, so influence of the stress of the substrate on the device is reduced; a gap between an electrode and the MEMS structure is fairly small, so energy loss of the device is reduced, and low cost and high quality of the MEMS device are obtained.

Description

technical field [0001] The invention relates to semiconductor manufacturing technology, in particular to an integrated wafer-level vacuum-packaged MEMS device and a manufacturing method thereof. Background technique [0002] Micro-Electro-Mechanical Systems (MEMS for short) refers to a micro-device or system that can be mass-produced and integrates micro-mechanisms, micro-sensors, micro-actuators, and signal processing and control circuits. MEMS device manufacturing technology combines a variety of micro-fabrication technologies, opening up a new technical field and industry. Microsensors made with MEMS technology have very broad application prospects in aviation, aerospace, automobiles, military affairs and almost all fields that people come into contact with. [0003] The most common MEMS manufacturing method is to use silicon-on-insulator (SOI) wafers to manufacture MEMS devices. At this time, the sacrificial layer between the MEMS structure and the substrate is the sil...

Claims

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Application Information

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IPC IPC(8): B81C1/00B81B7/00
Inventor 周志健董靓陈永康刘政谚许国辉邝国华冯良杨恒李昕欣
Owner GUANGDONG HEWEI INTEGRATED CIRCUIT TECH
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