Seal first and etch later three-dimensional system-level chip flip-chip bump packaging structure and process method

Abstract

The invention relates to a packaging-prior-to-etching type three-dimensional system-level chip-flipped bump packaging structure and a process method thereof. The packaging structure comprises a pad (1) and pins (2), wherein conductive columns (3) are arranged on the front surfaces of the pins (2); a first chip (4) is normally bonded on the front surface of the pad (1); first molding compounds or epoxy resins (9) are encapsulated in the peripheral areas of the conductive columns (3), the first chip (4) and a first metal wire (5); second chips (7) are flipped on the back surfaces of the pad (1) and the pins (2); second molding compounds or epoxy resins (10) are encapsulated in the back areas of the pad (1) and the pins (2) and the peripheral areas of the second chips (7); and first metal balls (17) are arranged on the conductive columns (3). By virtue of the packaging-prior-to-etching type three-dimensional system-level chip-flipped bump packaging structure and the process method thereof, the problems of limitation of the whole packaging functional integrity caused by difficulty in embedding of an object into a conventional metal lead frame or a conventional organic substrate and requirements on smaller wire width and smaller wire interval of the conventional organic substrate can be solved.

Description

technical field [0001] The invention relates to a three-dimensional system-level chip flip-chip bump packaging structure and process method after sealing first and etching later, and belongs to the technical field of semiconductor packaging. Background technique [0002] Traditional four-sided leadless metal lead frame package structure such as Figure 102 As shown, the main manufacturing process is to take metal sheets for chemical etching and metal plating to make a base island for carrying chips and a metal lead frame with inner and outer pins, and then perform one-sided chip loading and wire bonding on this basis. , encapsulation and other packaging processes. [0003] The traditional organic multilayer circuit substrate packaging structure such as Figure 103 As shown, the main process is to form a multi-layer circuit board by stacking the core material of the glass fiber board by accumulating materials, opening holes between the circuit layers by laser drilling, and t...

AI Technical Summary

Problems solved by technology

[0010] The purpose of the present invention is to overcome the above-mentioned shortcomings, and provide a three-dimensional system-in-package structure and process method for sealing first and then etching chips, which can solve the problem that traditional metal lead frames or multilayer circuit substrates cannot embed chips and passive components. The integration of packaging functions and traditional organic substrates require thinner line width and narrower line-to-line spacing

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