Packaging-first-etching-second chip upside-upward-installation three-dimensional system-in-package structure and process method

Abstract

The invention relates to a packaging-first-etching-second chip upside-upward-installation three-dimensional system-in-package structure and a process method. The structure comprises a paddle (1) and a lead (2). The front of the lead (2) is provided with a conductive post (3), the front of the paddle (1) is provided with a first chip (4) in an upside-upward mode, the periphery of the conductive post (3), the periphery of the first chip (4) and the periphery of a first metal wire (5) are respectively coated with first molding compound or epoxy resin (9), the surface, exposed out of the first compound or the epoxy resin (9), of the conductive post (3) is provided with an anti-oxidation layer (11), the back of the paddle (1) is provided with a second chip (7) in an upside-upward mode, and the back of the paddle (1), the back of the lead (2), the area on the periphery of the second chip (7) and the area on the periphery of a second metal wire (8) are coated with second molding compound or epoxy resin (10). The structure has the advantage of being capable of solving the problems that an article cannot be embedded in a traditional metal lead frame or an organic substrate and accordingly the integration degree of the whole packaging function is limited, and the traditional organic substrate needs a smaller line width and a smaller distance between wires.

Description

technical field [0001] The invention relates to a three-dimensional system-level packaging structure and process method for sealing first and then etching chips, and belongs to the technical field of semiconductor packaging. Background technique [0002] Traditional four-sided leadless metal lead frame package structure such as Figure 101 As shown, the main manufacturing process is to take metal sheets for chemical etching and metal plating to make a base island for carrying chips and a metal lead frame with inner and outer pins, and then perform one-sided chip loading and wire bonding on this basis. , encapsulation and other packaging processes. [0003] The traditional organic multilayer circuit substrate packaging structure such as Figure 102 As shown, the main process is to form a multi-layer circuit board by stacking the core material of the glass fiber board by accumulating materials, opening holes between the circuit layers by laser drilling, and then plating the h...

AI Technical Summary

Problems solved by technology

[0010] The purpose of the present invention is to overcome the above-mentioned shortcomings, and provide a three-dimensional system-in-package structure and process method for sealing first and then etching chips, which can solve the problem that traditional metal lead frames or multilayer circuit substrates cannot embed chips and passive components. The integration of packaging functions and traditional organic substrates require thinner line width and narrower line-to-line spacing

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