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Vertical power mosfet and methods of forming the same

A semiconductor and body region technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as high resistance, adverse effects of vertical power MOSFET drive current, etc.

Active Publication Date: 2013-12-18
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the resistance of the n-JFET region is higher, which adversely affects the drive current of the vertical power MOSFET

Method used

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  • Vertical power mosfet and methods of forming the same
  • Vertical power mosfet and methods of forming the same
  • Vertical power mosfet and methods of forming the same

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Embodiment Construction

[0027] The making and using of embodiments of the invention are discussed in detail below. It should be appreciated, however, that the present embodiments provide many applicable inventive concepts that can be implemented in a wide variety of specific contexts. The specific embodiments discussed are illustrative only, and do not limit the scope of the invention.

[0028] Vertical power metal oxide semiconductor field effect transistors (MOSFETs) and methods of forming the same are provided according to various exemplary embodiments. Intermediate stages in forming a vertical power MOSFET are shown. Variations of the embodiments are discussed. Like reference numerals are used to identify like elements throughout the various drawings and throughout the illustrative embodiments.

[0029] Figure 1A to Figure 1F is a cross-sectional view of an intermediate stage in the formation of an n-type vertical power MOSFET. refer to Figure 1A , providing a semiconductor region 20 that ...

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Abstract

A device includes a semiconductor layer of a first conductivity type, and a first and a second body region over the semiconductor layer, wherein the first and the second body regions are of a second conductivity type opposite the first conductivity type. A doped semiconductor region of the first conductivity type is disposed between and contacting the first and the second body regions. A gate dielectric layer is disposed over the first and the second body regions and the doped semiconductor region. A first and a second gate electrode are disposed over the gate dielectric layer, and overlapping the first and the second body regions, respectively. The first and the second gate electrodes are physically separated from each other by a space, and are electrically interconnected. The space between the first and the second gate electrodes overlaps the doped semiconductor region.

Description

technical field [0001] The present invention generally relates to the field of semiconductor technology, and more particularly relates to a vertical power MOSFET and a method for forming the same. Background technique [0002] In a conventional vertical power metal oxide semiconductor field effect transistor (MOSFET), two p-body regions are formed in an n-type epitaxial region. The vertical power MOSFET is named so because the source and drain regions of the vertical power MOSFET overlap. The portion of the epitaxial region between the two P body regions is lightly doped to form an n-type doped region, sometimes called an n-type junction field effect transistor (n-JFET) region. The P body region and the n-JFET region are located under the gate dielectric layer and the gate electrode. When a positive voltage is applied to the gate, electron inversion regions (inversion regions) are formed in the P body region. The inversion region serves as a channel region that connects t...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/423H01L29/06H01L21/336
CPCH01L29/4232H01L29/66484H01L29/7827H01L29/7831H01L29/402H01L29/66712H01L29/7802H01L21/265H01L21/30604H01L21/823425H01L29/66666
Inventor 伍震威周学良柳瑞兴苏柏智
Owner TAIWAN SEMICON MFG CO LTD