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Silicon wafer bonding method

A silicon wafer and bonding technology, applied in electrical components, electrical solid devices, circuits, etc., can solve problems such as limitations, overall process and equipment limitations, and achieve the effect of reducing the fragmentation rate

Active Publication Date: 2014-02-12
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

However, the above-mentioned existing improvement methods will have great restrictions on the overall process and equipment, so they are greatly limited in actual use.

Method used

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Embodiment Construction

[0038] Such as Figure 5 Shown is the flow chart of the method of the embodiment of the present invention; Figure 6A to Figure 6E It is a schematic diagram of the silicon wafer 33 in each step of the method of the embodiment of the present invention. The silicon wafer 33 in the embodiment of the present invention is used to grow a silicon wafer with a diameter of 200 millimeters for an IGBT device of 600V10A; the method of the embodiment of the present invention includes the following steps:

[0039] Step 1, such as Figure 6A As shown, a carrier 31 for bonding with a silicon chip 33 is provided, and the carrier 31 is cleaned.

[0040] The material of the carrier 31 is glass, and in other embodiments, the material of the carrier 31 can also be silicon or sapphire.

[0041] The diameter of the slide 31 in the embodiment of the present invention is 200.1 mm to 202 mm. In other embodiments, the diameter of the carrier 31 can also be 0.1 mm to 0.3 mm larger than the diameter ...

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Abstract

The invention discloses a silicon wafer bonding method which comprises the steps of providing and cleaning a slide glass, spin-coating bonding glue on the surface of the slide glass, removing the edge of the bonding glue and bonding a silicon wafer and the slide glass together, wherein the bonding glue is ensured to be all positioned on the inner side of an area covered by the silicon wafer after bonding. Because the edge of the bonding glue is removed before the silicon wafer and the slide glass are bonded, no bonding glue remains on the side wall of the silicon wafer after the silicon wafer and the slide glass are bonded. Therefore, the breakage rate of the silicon wafer during silicon wafer dissociation can be reduced, and especially, the problem of breakage of a silicon wafer which is formed by adopting a Taiko process and is provided with a supporting ring at the periphery during dissociation can be effectively solved. Moreover, the silicon wafer bonding method can be well combined with the existing process and equipment without the need for additional cost.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit manufacturing process method, in particular to a silicon chip bonding method. Background technique [0002] In semiconductor manufacturing, the heat dissipation performance of high-voltage and high-power semiconductor devices is very important. Therefore, the thinner the silicon chip, the stronger its heat dissipation capability and the higher the power it can carry. Taking a typical 1200V100A insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT) device used in industrial or automotive electronics as an example, its thickness drops from about 300 microns of the original punch-through (PT) IGBT to field stop The (FS) type IGBT is about 170 microns, and further reaches 120 microns, and its working power loss also decreases. [0003] However, when the silicon wafer is thin to a certain extent and has a large area, its mechanical strength is greatly reduced. Taking an 8-inch...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/00
Inventor 王雷郭晓波
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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