29results about How to "Reduce Fragmentation Rate" patented technology

The utility model relates to the technical field of semiconductors and photovoltaics, in particular to an adsorption device and carrying equipment, and solves the problem that the carrying efficiency and the equipment cost cannot be considered at the same time in the carrying equipment in the related technology. The adsorption device comprises a bearing assembly, a first driving assembly, a first adsorption assembly and a second adsorption assembly. The first adsorption assembly and the second adsorption assembly are both connected to the bearing assembly, and the bearing assembly can be installed at the tail end of a carrying manipulator, so that the first adsorption assembly and the second adsorption assembly are driven by the carrying manipulator to move so as to carry a pair of half sheets at the same time, the carrying efficiency is improved, and the labor intensity of workers is reduced. And the number of carrying manipulators is reduced, the carrying cost is reduced, and the carrying efficiency and the equipment cost are both considered. Besides, the first driving assembly drives the first adsorption assembly to reciprocate in the first direction, so that the first half sheet and the second half sheet in the pair of half sheets are placed in sequence, and the fragment probability is reduced.

This utility model provides an electroplating fixture, relating to the field of photovoltaic technology. The electroplating fixture includes a frame, a force-applying component, a first clamping component, a second clamping component, a spring, and at least one set of conductive clamps for energizing photovoltaic cells. Each set of conductive clamps includes two opposing conductive clamps, with the two clamps in the same set respectively mounted on the first clamping component and the second clamping component. The frame has opposing first and second plates. The first clamping component is mounted on the first plate, with one end of the spring mounted on the first clamping component and the other end on the second clamping component, and the spring located within the frame. The force-applying component is rotatably mounted on the second plate, with its end face within the frame abutting against the side of the second clamping component away from the spring. The end face sequentially has a first abutment surface, a transition surface, and a second abutment surface, wherein the distance between the first abutment surface and the first plate is greater than the distance between the second abutment surface and the first plate. This electroplating fixture can reduce the breakage rate of photovoltaic cells during electroplating.

The utility model discloses a photovoltaic cell string load disc, including bottom wall and setting in the two side walls of opposite side of bottom wall, bottom wall and two side wall form a along the first direction extension's storage part, the end of side wall has the inclined plane, the both sides of bottom wall both ends respectively are provided with the extension from bottom wall edge outward, be equipped with antiskid sleeve on extension department, the utility model discloses the end of side wall is provided with the inclined plane at the load disc, when the load disc is standing and placed, the side wall of load disc does not contact with ground, has reduced the risk of the deformation of side wall end, thereby has reduced the probability that the battery string appears hidden crack or fragment because of the deformation of load disc end, has improved the yield of battery piece, and the extension is provided with antiskid sleeve on the both sides of bottom wall both ends respectively, and the extension is wrapped with antiskid sleeve, and antiskid sleeve has the effect of buffering and antiskid, can prevent the load disc to slide down, makes the load disc stably place on the ground.

The application provides a limiting pin for a mechanical arm and the mechanical arm, and the limiting pin comprises: a base assembly, which is installed on the mechanical arm; and a limiting piece, which is connected to the base assembly. The side of the limiting piece used for contacting the wafer is an inclined surface, and the inclined surface is inclined towards the side away from the wafer, so as to contact the edge of the wafer and limit the wafer. The limiting pin of the application comprises the base assembly and the limiting piece. The side of the limiting piece used for contacting the wafer is designed as the inclined surface, and the inclined surface is inclined towards the side away from the wafer. When contacting the edge of the wafer, the wafer can be prevented from being stuck on the limiting pin and the abrasion of the limiting pin is reduced, so that the wafer is prevented from appearing the situations of wafer dragging and wafer breaking, the wafer breaking rate is reduced, and in addition, the maintenance cost of the equipment caused by wafer breaking is reduced.

The application provides a wafer correction system and a semiconductor process equipment, wherein the wafer correction system comprises: a wafer correction device, which comprises a bearing structure and a center correction mechanism, wherein the bearing structure is used for bearing a wafer, and the center correction mechanism is matched with the bearing structure to drive the bearing structure to move in a horizontal plane; a position detection device, which is used for detecting a first current position of the center of the wafer; and a controller, which is in communication connection with the position detection device and the center correction mechanism, has a first preset target position in the horizontal plane, and is used for controlling the center correction mechanism to act according to the first current position and the first preset target position, so as to drive the bearing structure to move to the center of the wafer coinciding with the first preset target position. The wafer correction system can at least correct the center position of the wafer, and can ensure that the center position of the wafer is uniquely determined after correction, so as to facilitate the positioning and grabbing of a subsequent mechanical hand and be beneficial to reducing the broken piece rate.

The utility model relates to the technical field of crystalline silicon cell production and manufacturing, in particular to a novel chain type roller fragment structure which comprises a pressing rod and a connecting rod. A plurality of groups of connecting rods are mounted at the outer ends of the plurality of groups of pressing rods, the outer wall of one group of connecting rods is sleeved with an anti-pinch wheel, and cold air knives are mounted on the outer sides of the plurality of groups of pressing rods and the outer sides of the connecting rods. According to the utility model, the anti-pinch roller is used for supporting, the use of a water-driving roller is reduced, the direct contact area between the silicon wafer and the compression bar roller is reduced, the friction force and extrusion gravity generated by contact are reduced, the risk that the silicon wafer is broken due to external force in the transmission process is effectively reduced, and the surface quality of the silicon wafer is improved; production interruption and extra cleaning work caused by fragments are reduced; and the next roller in the rollers is changed into a cold air knife, nitrogen blowing is used for replacing mechanical extrusion water driving, high-speed and low-temperature airflow is provided, moisture on the surface of the silicon wafer can be quickly dried, and the production efficiency is improved.

The utility model relates to oxygen sensor technical field, specifically disclose a sensitive element and terminal connecting structure of oxygen sensor, through all the height of terminal fixing piece on the terminal flush setting, make the sensitive element on the connecting contact can be parallelly arranged, thereby shorten the length of sensitive element, reduce manufacturing cost, and the terminal fixing piece still is equipped with the limit step, the limit step on the terminal fixing piece and the casing of oxygen sensor contact when installing, thereby the centrifugal force is passed through the limit step and is delivered to the assembly casing, thereby reduce the fragment rate of sensitive element.

This invention discloses a photovoltaic module arrangement device, arrangement method, production system, and production method. The photovoltaic module arrangement device includes: a support unit for supporting a substrate assembly, the substrate assembly including a lower rigid plate and a lower flexible layer; a cell loading unit for moving multiple cells to corresponding positions on the substrate assembly, the cell loading unit being movable relative to the substrate assembly supported by the support unit; and a solder ribbon loading unit for moving multiple solder ribbons to corresponding positions on the substrate assembly, the solder ribbon loading unit being movable relative to the substrate assembly supported by the support unit. This photovoltaic module arrangement device reduces the number of cell handling operations, thereby improving the yield and production continuity of the module production line.

This invention discloses a PECVD equipment and a silicon wafer passivation method. The PECVD equipment includes a reaction chamber and an RF power supply. The reaction chamber includes a base, an electrode plate vertically disposed within the reaction chamber, and a wafer cassette. The wafer cassette is used to hold multiple stacked silicon wafers and is positioned at a predetermined location on the base, such that the wafer cassette, after entering the reaction chamber, can be arranged on both sides of the electrode plate. The wafer cassette has an opening so that the passivation-to-be-treated sides of the stacked silicon wafers face the electrode plate. The RF power supply is electrically connected to the electrode plate. The wafer cassette and the base are grounded. The reactive gas introduced into the reaction chamber dissociates to form plasma, which is then deposited on the passivation-to-be-treated sides of the silicon wafers adjacent to the electrode plate. This invention avoids the need for plating around the wafer, shortens process time, reduces process temperature, improves equipment efficiency, and reduces breakage rate.

This invention discloses a silicon wafer, a solar cell, and a photovoltaic module, relating to the field of silicon wafer manufacturing technology, and is used to solve the problem of high silicon wafer breakage rate. The silicon wafer is rectangular, and the length-to-width ratio of the silicon wafer is 1:0.4 to 1:0.6; the silicon wafer includes two surfaces and four side surfaces located between the two surfaces; at least one surface has multiple dicing marks extending along the width direction of the silicon wafer, and the dicing marks are arc-shaped; along the direction parallel to the extension path of the dicing marks, the silicon wafer is sequentially divided into a first edge region, a central region, and a second edge region; the width of the first edge region and the second edge region in the direction parallel to the extension path of the dicing marks is greater than or equal to 5 mm and less than or equal to 20 mm; wherein, the average thickness of the first edge region and / or the average thickness of the second edge region is greater than the average thickness of the central region.

The application discloses a model inference acceleration method, system, device and medium of a vehicle-mounted edge device, the method comprising: by analyzing the inference task request and dynamically hot loading the model weight, mapping the pre-filling stage and the decoding stage to different CUDA streams for parallel processing, and introducing a forced preemption mechanism to ensure the real-time performance of high-priority tasks. Through paging memory management and KV Cache hierarchical replacement strategy, the memory resources are optimized, and combined with power consumption monitoring and bottom layer hardware instruction set optimization, the technical problems of low resource utilization, high-priority task delay and excessive power consumption of the existing vehicle-mounted edge device in multi-task concurrency are solved. The application can effectively improve the inference throughput and system stability of the model in the vehicle-mounted edge device, solve the technical problems of low resource utilization, high-priority task delay and excessive power consumption of the existing vehicle-mounted edge device in multi-task concurrency, and is suitable for complex computing scenarios of intelligent vehicles.

This application relates to a silicon wafer support device and a solar cell production system. The silicon wafer support device includes a carrier plate body, multiple support members, and reinforcing members. The carrier plate body has a hollowed-out portion. Multiple support members are spaced apart from each other in the hollowed-out portion, and each support member forms a bearing surface on one side along the depth direction of the hollowed-out portion. Reinforcing members are disposed in the hollowed-out portion, connected to the carrier plate body, and supported by the support members on the other side along the depth direction of the hollowed-out portion. This silicon wafer support device, by spaced apart from each other, connects the front and back sides of the silicon wafer through the gaps between the support members, enabling the full plating of both the front and back sides of the silicon wafer to be completed in one step during PVD processing. By providing reinforcing members to support the support members, the structural strength of the support members is improved, thereby effectively reducing deformation or detachment of the support members and ensuring stable support for the silicon wafer, which helps reduce the breakage rate of the silicon wafer during the supporting process.

The present application relates to the field of photovoltaic module manufacturing, in particular to a BC battery interconnection structure and application thereof. The BC battery interconnection structure comprises: a packaging adhesive film layer, a first conductive adhesive layer, a flexible substrate layer and a second conductive adhesive layer arranged in layers; and a stress buffer material is arranged on the surface of the second conductive adhesive layer. The BC battery interconnection structure has a curing temperature of ≤ 150℃, a fragment rate reduced by 80%, avoids thermal stress damage, a contact resistance of ≤ 0.5 mΩ / cm 2 , has a stress buffering function, adapts to thermal cycle conditions, has a contact resistance change rate of < 10% after thermal cycle testing, can be one-step cured and formed, does not need flux cleaning, reduces equipment investment by 50%, is suitable for thinning batteries; can complete interconnection and packaging in one step without a separate welding process; a three-dimensional conductive network makes the volume resistivity ≤ 5 × 10 ‑5 Ω·cm; and is compatible with various battery technologies such as PERC, TOPCon, HJT and BC.

This utility model belongs to the field of wafer insertion machine technology, specifically relating to a four-head wafer insertion machine layout structure, including: a conveyor production line, a three-axis transport device, a full basket conveyor line, and a return basket production line. Each conveyor production line is used to transport silicon wafers along the y-axis direction. Each conveyor production line has a lifting and loading device at its end, with a basket for loading silicon wafers mounted on it. The full basket conveyor line transports baskets loaded with silicon wafers along the y-axis direction, and the return basket production line transports empty baskets along the y-axis direction. The three-axis transport device moves baskets between the return basket production line, the full basket conveyor line, and the lifting and loading device. This utility model, through a reasonable equipment layout and automated operation process, effectively solves the technical problems of silicon wafer or equipment damage and low production efficiency caused by improper layout in existing technologies, achieving improved production efficiency and reduced breakage rate.

This invention provides a wafer storage device and semiconductor equipment. The temperature control unit includes a cooling module and a preheating module, which are thermally connected to the wafer carrier plate through a thermally conductive structure. In the preheating mode, the preheating module heats the wafer carrier plate to a first preset temperature. Due to the increased temperature of the wafer carrier plate, the high-temperature wafer will not break due to a sudden temperature drop after entering the wafer storage device. After the wafer is placed on the wafer carrier plate, it is still at a relatively high temperature. Under the influence of the supporting force of the wafer carrier plate and its own gravity, the warpage of the wafer will be corrected to a certain extent. Before certain process steps, the preheating module can preheat the wafer in advance, thereby reducing the heating time of the process cavity and improving the efficiency of subsequent processes. In the cooling mode, the preheating module and the cooling module work simultaneously to linearly cool the wafer carrier plate to a second preset temperature, which can avoid sudden temperature changes of the wafer and reduce the probability of wafer breakage during cooling.

The embodiment of the present application relates to the photovoltaic field, and provides a solar cell, a preparation method thereof, a laminated cell and a photovoltaic module, the solar cell comprises: a silicon substrate comprising oppositely arranged first and second surfaces, the first surface comprises first and second regions arranged alternately along a first direction, and the second region comprises first and second sub-regions arranged along a second direction; the first region comprises a first doped region, the first sub-region comprises a second doped region, and the second sub-region comprises a third doped region; the doping concentration of the second doped region is greater than that of the third doped region; and a first metal gate line is electrically connected with the first doped region. The solar cell provided by the embodiment of the present application is at least beneficial to improving the problems that the silicon substrate in the prior art is prone to bending, resulting in a high fragment rate, and the deposition thickness of silicon nitride is poor in uniformity.

The invention provides a defect wafer intercepting method, device and equipment and a medium. The interception method comprises the steps that a prediction failure risk coefficient of defects on a wafer to be annealed is acquired, and the prediction failure risk coefficient is used for quantifying the probability that after the defects on the wafer to be annealed are degraded in the annealing process, the degradation defects induce failure of the wafer to be annealed; based on the predicted failure risk coefficient, dynamically determining whether the defect on the wafer to be annealed induces the failure of the wafer to be annealed in the annealing process, the dynamic determination being performed based on a dynamic reference, and the dynamic reference being adapted to the adjustment of preset process parameters of the annealing process; and if the defect on the to-be-annealed wafer is dynamically judged to induce failure of the to-be-annealed wafer in the annealing process, carrying out interception operation. The intercepting method can effectively intercept the defective wafer in the feeding process of the annealing furnace.

The invention provides a mechanism, a system and a method for clamping a wafer front opening type transportation box, and belongs to the technical field of semiconductor manufacturing automation equipment. The invention provides a clamping system capable of being compatible with two material postures at a constant stroke aiming at a 12-inch wafer front opening type transportation box with trapezoidal geometrical characteristics. The system comprises a clamping mechanism, a transmission steering module and a signal transmission unit. Each pair of clamping jaw arms of the clamping mechanism is provided with a near-end clamping part and a far-end clamping part which are arranged in the extending direction. When the front opening type transportation box is in the first posture, the near-end clamping part completes clamping; and when the front opening type transportation box is rotated by 180 degrees to be in a second posture, the far-end clamping part completes clamping of the wide edge shifted to the far end under the same stroke. According to the invention, the dependence on complex variable stroke control is eliminated, and the operation efficiency and the mechanism reliability of the semiconductor packaging line are obviously improved.

The invention discloses a composition acting on an ovary somatic cell membrane structure and application of the composition. The composition acting on the ovary somatic cell membrane structure comprises the following components in parts by weight: 12-18 parts of a clove extract, 4-8 parts of a sophora flower bud extract, 8-12 parts of Chinese yam protein polypeptide, 4-8 parts of a cranberry extract and 8-12 parts of a citrus extract. The composition can act on an ovary somatic cell membrane structure to improve the mitochondrial function of oocytes, increase the number of the oocytes and reduce the fragment rate of the oocytes, so that the ovary function of elderly women is improved, and the purposes of improving the fertility and delaying senescence are achieved.

The utility model relates to the technical field of batteries, and discloses an improved mechanism for automatically reducing fragments by PECVD (Plasma Enhanced Chemical Vapor Deposition) of a heterojunction battery. According to the improved mechanism for automatically reducing fragments in the PECVD of the heterojunction battery, the silicon wafer segmentation block is used for separating a front silicon wafer and a rear silicon wafer and adopts a conical structure, and the silicon wafer segmentation block on the cushion block adopts the conical structure, so that when the wafers are placed on the cushion block by the automatic lifting platform, the silicon wafers can slide down from the conical structure if slight deviation exists, and the silicon wafers are separated from the cushion block. The screw holes are used for fixing the cushion block and fixing the cushion block on the belt of the rapid runway, the cushion block platform is used for lifting the silicon wafer, and the novel cushion block is formed by replacing the silicon wafer segmentation block above with the conical segmentation block and replacing the cushion block on the belt of the rapid runway with the novel cushion block on the basis of the original cushion block. When the silicon wafers are placed on the belt, the silicon wafers are prevented from being broken in the transmission process or the gantry feeding and discharging process due to edge landing caused by the cushion blocks, and therefore the purpose of reducing the fragment rate is achieved.

A forming method of a semiconductor structure comprises the steps that a substrate is provided, the substrate comprises a first device region and a second device region and comprises a first face and a second face which are opposite, and a first doping region is arranged in the substrate; forming a first device structure in the first device region, wherein the first device structure comprises a gate structure located in the first device region and an emitter located in the first device region; a second device structure is formed in the second device region and comprises an anode, and the emitter and the anode are located on the first surface; forming a protective layer on the first surface of the substrate, wherein the thickness of the protective layer is higher than the top surfaces of the emitter and the anode; thinning the second surface of the substrate by taking the protective layer as a structural support; after the second surface of the substrate is thinned, a collector electrode is formed in the first device region; and forming a cathode in the second device region, wherein the collector and the cathode are located on the second surface. According to the forming method, the process is simplified, and fragments are reduced.

The utility model provides a cleaning brush cover plate module which comprises a cleaning brush base, a cleaning brush and a cleaning brush cover plate, the cleaning brush base comprises a middle groove part and an edge extension part, the middle groove part is used for containing the cleaning brush, the edge extension part is located on the periphery of the middle groove part, and an electromagnetic device is arranged on the edge extension part; the cleaning brush cover plate is used for covering the cleaning brush base and comprises an inner side face and an outer side face, the inner side face is provided with metal conductors with the same number as the electromagnetic devices, when the cleaning brush cover plate covers the cleaning brush base, the inner side face faces the cleaning brush base, and at the moment, the positions of the metal conductors are matched with the positions of the electromagnets. According to the cleaning brush cover plate module, the problem that the existing cleaning brush cover plate module is easy to cause wafer fragments is solved.

The application relates to a high-flatness space solar cell preparation method and a solar cell, and the preparation method comprises the following steps: preparing electrodes on the front surface and the back surface of a solar cell epitaxial wafer respectively; evaporating an anti-reflection film on the front surface of the solar cell wafer; alloying the solar cell wafer; low-temperature processing the solar cell wafer, wherein the low-temperature processing comprises placing the solar cell wafer in preset low temperature for a certain time, and then restoring the solar cell wafer to room temperature; and pasting an anti-radiation glass cover on the solar cell wafer. The application improves the flatness of the solar cell, can fully paste the solar cell assembly to a solar wing substrate, avoids the risk of the solar cell fragmenting and falling during assembly pasting caused by the adhesive stress sealing due to the warping degree of the solar cell, guarantees the safety of the solar cell on the solar wing, avoids the solar cell fragmenting and the on-orbit current reduction caused by the warping of the solar cell, and effectively improves the reliability of the satellite solar wing.

The application provides a substrate caching device, and belongs to the technical field of material caching. The application solves the problem of high fragmentation rate of ceramic substrate caching in the prior art. The substrate caching device comprises a storage rack and a material belt assembly. The storage rack has multiple storage plates. The storage plates have an inlet side and an outlet side. The inlet side is provided with a first material port and a second material port. The material belt assembly comprises a first conveying belt and a second conveying belt. The first conveying belt is arranged on the inlet side and has a first feeding section. The first feeding section is located in a first projection area. The second conveying belt has a second feeding section. The second feeding section is located in a second projection area. The sum of the lengths of the first feeding section and the second feeding section is greater than the length of the substrate in the first direction. The first direction is defined as the direction in which the substrate is conveyed from the inlet side to the outlet side. The first feeding section and the second feeding section form an area for supporting the substrate upward, thereby avoiding the substrate from being missed and reducing the fragmentation rate of the substrate caching.

The utility model relates to the field of solar cell production. A feeding silicon wafer blowing device comprises correlation optical fibers 1, a lower blowing device 2, an upper blowing device 3, a tray 9 and a transmission screw 8, the feeding silicon wafer blowing device is installed in a box body 4, a through hole with a threaded hole is formed in the bottom of the box body 4, and the bottom of the tray 9 located in the box body 4 is connected with one end of the transmission screw 8. The other end of the transmission screw 8 penetrates through a through hole with a threaded hole in the bottom of the box body 4 and then is connected with an output shaft of a motor, and upper blowing devices 3 are installed on the front inner cavity wall and the rear inner cavity wall of the left side of the box body 4. And the upper and lower blowing devices are arranged to form up and down different airflow distributions, so that the large-spacing separation of the silicon wafers is realized.

The utility model belongs to the technical field of wafer inserting machines, and particularly relates to a three-head wafer inserting machine layout structure which comprises conveying production lines, a full basket conveying line, a basket returning production line and a carrying device, each conveying production line is used for conveying silicon wafers in the y-axis direction, and the tail end of each conveying production line is provided with a wafer inserting device. The wafer inserting device is provided with flower baskets used for loading silicon wafers, the full-basket conveying line is used for conveying the flower baskets loaded with the silicon wafers in the y-axis direction, the basket returning production line is used for conveying unloaded flower baskets in the y-axis direction, and the carrying device is arranged above the three conveying production lines, the full-basket conveying line and the basket returning production line in a crossing mode in the x-axis direction. And the carrying manipulator is used for carrying the flower baskets among the basket returning production line, the full basket conveying line and the sheet inserting device. According to the utility model, through the reasonable equipment layout and the automatic operation process, the technical problems of damage to silicon wafers or equipment bodies and low production efficiency caused by improper layout in the prior art are effectively solved, and the improvement of the production efficiency and the reduction of the fragment rate are realized.

The application discloses a full-automatic debonding machine which is used for peeling off glass pieces bonded on wafer pieces, and comprises a manipulator, a transfer platform, a carrying mechanism, a debonding mechanism, a peeling mechanism and a conveying mechanism. The manipulator is used for feeding and discharging the wafer pieces. The carrying mechanism is located between the transfer platform and the conveying mechanism and is used for carrying the wafer pieces between the transfer platform and the conveying mechanism. The debonding mechanism is located on one side of the peeling mechanism and is used for debonding the wafer pieces. The conveying mechanism is arranged below the debonding mechanism and the peeling mechanism and is used for conveying the wafer pieces between the debonding mechanism and the peeling mechanism. The peeling mechanism is used for peeling off the glass pieces from the debonded wafer pieces. Compared with the existing debonding mode, the full-automatic production of the feeding, debonding, peeling and discharging processes is realized, the contact between the artificial and the product is reduced, the broken piece rate is low, and the production efficiency is high.

The present application relates to the technical field of crystalline silicon solar cell manufacturing, and particularly relates to a low-damage laser patterning method of a thermal-oxygen protective layer, comprising the following steps: providing a crystalline silicon wafer treated by texturing, growing a thermal-oxygen silicon oxide layer on the surface of the textured surface, and depositing an amorphous silicon layer on the surface of the thermal-oxygen silicon oxide layer; using a laser to locally pattern the amorphous silicon layer, so that the amorphous silicon layer in the processing area is subjected to film opening or oxidation modification; using HF etching liquid to selectively etch the crystalline silicon wafer after laser processing; performing selective removal treatment on the crystalline silicon wafer after HF etching, removing only the amorphous silicon layer in the unprocessed area, and completely retaining the thermal-oxygen silicon oxide layer in the unprocessed area; using the thermal-oxygen silicon oxide and amorphous silicon double-layer protection to realize low-damage laser patterning, greatly reducing silicon wafer lattice damage, eliminating surface height difference, avoiding additional thinning of the silicon wafer, being compatible with mainstream battery routes, and effectively improving battery efficiency and mass production yield.