How to make a mos transistor

Abstract

A manufacturing method for an MOS (Metal Oxide Semiconductor) transistor is characterized in that a substrate is provided, a dummy gate structure is formed on the substrate and includes gate dielectric layers and dummy gate electrodes located on the gate dielectric layers, and first side walls are formed on the two sides of the dummy gate structure; the substrate is etched with the dummy gate structure and the first side walls serving as masks, and grooves are formed in the substrate on the two sides of the dummy gate structure; the grooves are filled with semi-conductor materials; a sacrificial layer is formed between the first side walls after the semi-conductor materials are formed, and the thickness of the sacrificial layer is smaller than the heights of the first side walls; a dielectric layer is formed to cover the sacrificial layer, the first side walls and the dummy gate structure; the dielectric layer is etched back to form second side walls on the two sides of the dummy gate structure and on the first side walls; the sacrificial layer is removed. The performance of the MOS transistor which is prepared subsequently can be improved through the manufacturing method for the MOS transistor.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, in particular to a method for manufacturing a MOS transistor. Background technique [0002] In the existing manufacturing process of semiconductor devices, since stress can change the energy gap and carrier mobility of silicon materials, it has become an increasingly common means to improve the performance of MOS transistors through stress. Specifically, by properly controlling the stress, the mobility of carriers (electrons in NMOS transistors and holes in PMOS transistors) can be increased, thereby increasing the driving current, thereby greatly improving the performance of MOS transistors. For PMOS transistors, embedded silicon germanium technology (Embedded SiGe Technology) can be used to generate compressive stress in the channel region of the transistor, thereby improving carrier mobility. The so-called embedded silicon germanium technology refers to embedding silicon germanium m...

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is that the performance of the PMOS transistor formed by the prior art is not good

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