High-speed RCV biasing system

Abstract

The invention provides a novel high-speed RCV biasing system. The high-speed RCV biasing system comprises a biasing module, a first-class amplifier and a newly inserted biasing circuit, wherein a bias voltage vbias is supplied by the biasing module; the bias voltage vbias is inputted to the biasing circuit; a bias voltage vb1 and a bias voltage vb2 are outputted by the biasing circuit; the input of source current of the first-class amplifier is realized by a cascode structure component; the bias voltage vb1 and the bias voltage vb2 are respectively received by two grids of the cascode structure component. The high-speed RCV biasing system is capable of greatly reducing the influence of the input signal on the current source, supplying a stable 'Ibias' current and greatly reducing the mismatch of an RCV system for the transmission delay of input signals 1 and 0, so that the RCV performance is effectively promoted. The system structure is simple and clear and is easily realized; the system does not occupy a large domain area; the present RCV system is not greatly modified.

Description

technical field [0001] The present invention relates to an RCV biasing system. Background technique [0002] like figure 1 In the existing current source RCV amplifier system shown (including a bias module and an operational amplifier), vbias is a bias voltage, and its function is to control the current source so that it outputs a constant current. [0003] figure 2 It is a structural diagram when an existing RCV system is applied to a single-ended input system. For the single-ended input signal vin, one function of the first-stage amplifier is to convert it into a pair of differential signals (vout&vout_n); the other function is to convert the change of vin at the level of the external voltage vext to vout / vout_n as a level shifter Changes around its common-mode voltage 'vcmon' at the level of the internal voltage vint; the third function is to amplify, amplifying the weak small signal changes of vin to large signal fluctuations that can be identified by the second-stag...

AI Technical Summary

Problems solved by technology

[0008] 1. Due to the channel length modulation effect, the jitter of the source-drain voltage (vcm) will cause the output current Ibias to be unstable.

[0009] 2. The gate-source parasitic capacitance of the input pair tube will cause the coupling of the current source bias voltage 'vbias' with 'vcm'. When 'vcm' swings with the input signal 'vin', 'vbias' will be affected and further aggravate the bias Instability of current Ibias.

[0010] 3. Unstable 'Ibias' causes RVC to have a large mismatch in the transmission delay between the rising and falling edges of the input signal (ie input 1 and input 0) to the RCV output rcv_out.

[0011] In summary, for the existing RCV system with single-ended input signals, due to the secondary effect of the MOSFET device, the large input signal swing of the first-stage amplifier causes the current source device to fail to output stably, resulting in a mismatch in the response time of different input signals. It limits the improvement of RCV operating frequency and the reduction of the minimum resolution voltage (ie, the improvement of sensitivity), which seriously affects the system performance

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