Divide-by-two frequency divider circuit based on current mirror switching logic

Abstract

The invention discloses a dividing two frequency divider circuit based on current mirror switch logic, which belongs to the technical field of integrated circuits. The dividing two frequency divider circuit comprises a power supply positive input port, a power supply negative input port, a differential clock positive phase signal input port, a differential clock negative phase signal input port, a differential positive phase data signal input port, a differential negative phase data signal input port, a Q path differential positive phase frequency dividing signal output port, a Q path differential negative phase frequency dividing signal output port, a PMOS tube current mirror bias voltage input port, an NMOS tube current mirror bias voltage input port, and two D triggers. A PMOS tube is used to replace a load resistor in a traditional dividing two frequency divider, which reduces the area of a chip. An active device is used to replace a passive device, which avoids the defect that the resistor is used as a kind of conduction of a current mirror switch. Two PMOS tubes are alternately turned on, which reduces power consumption at the same frequency under the condition of low voltage. The circuit has the advantages of low noise, high anti-interference ability, and wide frequency input range.

Description

technical field [0001] The invention relates to a divide-by-two frequency divider circuit based on current mirror switch logic, and belongs to the technical field of integrated circuits. Background technique [0002] With the development of the integrated circuit industry and the continuous improvement of CMOS circuit manufacturing technology, wireless communication equipment manufactured using CMOS technology has also undergone tremendous changes. These changes have become the development trend of wireless communication technology in the next stage for high frequency and low power consumption. Lay the groundwork. [0003] At this stage, the transceiver of wireless communication technology is mainly implemented by a phase-locked loop frequency synthesizer. The frequency of the phase-locked loop is composed of a voltage-controlled oscillator (VCO, Voltage Controlled Oscillator) and a prescaler. Frequency conversion and down conversion functions. In this synthesizer, a modul...

AI Technical Summary

Problems solved by technology

However, compared with the traditional structure, the structure proposed in this patent adds 4 MOS transistors. The increase of MOS transistors will undoubtedly increase the area of ​​the chip, and on the other hand, it will also increase the power consumption of the chip.

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