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Fin type field effect transistor with SiGeSn channel and forming method thereof

A fin field effect and transistor technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of high cost, easy segregation of Sn, and time-consuming growth process, and achieves low cost and good electrical performance. Effect

Inactive Publication Date: 2014-06-04
TSINGHUA UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This method can obtain SiGeSn films with better crystal quality, but the equipment is expensive, the growth process is time-consuming, and the cost is high, which will be limited in large-scale production
Some people also use chemical vapor deposition (CVD) to grow SiGeSn films, but the quality of SiGeSn films is poor, the thermal stability is not good, Sn is easy to segregate, and it is not suitable for semiconductor devices.
Moreover, in the FinFET structure, it is generally necessary to use the method of selective area formation to form SiGeSn. In theory, chemical vapor deposition can be used to selectively grow SiGeSn thin films. However, the current method has poor thermal stability when non-selectively growing SiGeSn alloys. , Sn is easy to segregate, its selective growth process is not yet mature, and the cost is high

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  • Fin type field effect transistor with SiGeSn channel and forming method thereof
  • Fin type field effect transistor with SiGeSn channel and forming method thereof
  • Fin type field effect transistor with SiGeSn channel and forming method thereof

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Embodiment Construction

[0036] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0037] In the present invention, unless otherwise clearly specified and limited, a first feature being "on" or "under" a second feature may include direct contact between the first and second features, and may also include the first and second features Not in direct contact but through another characteristic contact between them. Moreover, "above", "above" and "above" the first feature on the second feature include that the first feature is directly above and obliquely above the second feature, or simply means that the first feat...

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Abstract

The invention provides a fin type field effect transistor with a SiGeSn channel and a forming method thereof. The forming method comprises the following steps of providing a substrate, forming a fin-shaped Ge structure on the substrate, injecting atoms or molecules or ions or plasma containing a Si element and a Sn element into the fin-shaped Ge structure so that a SiGeSn layer can be formed, and forming a gate stack structure on the SiGeSn layer. According to the forming method, a FinFET with a SiGeSn channel area small in thickness and good in quality can be obtained; the method has the advantages of being simple and easy to implement and low in cost.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a fin field effect transistor with a SiGeSn channel and a forming method thereof. Background technique [0002] Metal-oxide-semiconductor field-effect transistors (MOSFETs) have served the integrated circuit industry for over forty years. People have invented a variety of ingenious techniques to make the feature size shrink continuously, but it has not changed its basic structure. However, the integrated circuit design window, including performance, dynamic power consumption, static power consumption, and device tolerances, has shrunk to the point where a new transistor structure has to be invented. As the gate length continues to shrink, the transfer characteristics of the MOSFET (I ds -V gs ) degenerates mainly in two aspects. One is that the subthreshold slope becomes larger and the threshold voltage decreases, that is, by reducing the gate electrode voltage V g...

Claims

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Application Information

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IPC IPC(8): H01L21/336H01L29/78
CPCH01L29/66795H01L29/1033H01L29/161H01L29/167H01L29/785
Inventor 王敬肖磊赵梅梁仁荣许军
Owner TSINGHUA UNIV
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