Method and system for monitoring single event upset effect of FPGA (field programmable gate array) and correcting reloading

A single-event flipping and reloading technology, which is applied in information storage, static memory, digital memory information, etc., can solve the problems of import restrictions on high-performance devices, affect the normal operation of devices, and limit applications, so as to reduce PCB layout area, Enhance the ability to resist single event effect and ensure the effect of reliability

Inactive Publication Date: 2014-08-06
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0012] First, due to political reasons, high-performance and high-reliability signal processing devices are facing embargoes from the United States and European aerospace powers, and the import of high-performance devices in my country's digital signal processing platforms is restricted, especially large-scale and high-grade FPGAs;
[0013] Second, limited to the manufacturing process and technology, there is no high-performance radiation-hardened FPGA independently developed in my country at present, and ordinary industrial-grade or even military-grade devices use a large number of on-chip SRAMs, which are affected by space high-energy particles. Single event effect occurs The probability is greatly increased, seriously affecting the normal operation of the device, which limits their application in digital signal processing platforms

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  • Method and system for monitoring single event upset effect of FPGA (field programmable gate array) and correcting reloading
  • Method and system for monitoring single event upset effect of FPGA (field programmable gate array) and correcting reloading
  • Method and system for monitoring single event upset effect of FPGA (field programmable gate array) and correcting reloading

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Embodiment Construction

[0046] The present invention will be described in detail below in conjunction with the embodiments and accompanying drawings, but the present invention is not limited thereto.

[0047] Such as figure 1 As shown in Fig. 1, a method for monitoring whether the single event flip effect occurs in the SRAM FPGA in space and correcting the reload, the hardware includes an antifuse FPGA, a FLASH memory chip and a SRAM FPGA. Among them, the load-related signal lines of the SRAM FPGA are connected to the antifuse FPGA, including CCLK, RDWR, DATA[0:7], PROGRAM, and CS. At the same time, the SRAM type FPGA should be in slave loading mode, and the CCLK clock is provided by the antifuse FPGA.

[0048] Such as figure 2 As shown in , the software flow diagram is the main steps of monitoring the SRAM FPGA in the antifuse FPGA. When the power is just turned on, the state machine is in the power-on reset state. In this state, the antifuse FPGA resets the memory chip, and at the same time con...

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Abstract

The invention discloses a method for monitoring a single event upset effect of an FPGA (field programmable gate array) and correcting reloading. The method comprises the steps: an antifuse FPGA reads back a configuration word through a configuration word readback function of an SRAM (static random access memory) type FPGA, compares the configuration word with a correct configuration word pre-stored in an FLASH storage chip, checks whether the SRAM type FPGA generates single event upset or not, and performs reloading through a loading program pre-stored in the FLASH storage chip if the SRAM type FPGA generates the single event upset. The invention also discloses a system for monitoring the single event upset effect of the FPGA and correcting the reloading. The system comprises the FLASH storage chip, the antifuse FPGA and the SRAM type FPGA which are connected in sequence. The method and the system which are disclosed by the invention simulate a time sequence of a PROM (programmable read-only memory) to load the SRAM type FPGA through a loading file pre-stored in the FLASH storage chip; compared with the system adopting a preliminary writing PROM, the system disclosed by the invention has the advantages that the distribution area of a PCB (printed circuit board) is reduced, and equipment minimization is facilitated.

Description

technical field [0001] The invention relates to the application field of the SRAM FPGA in the aerospace field, in particular to a method and system for monitoring whether a single event flip effect occurs in the SRAM FPGA in space and correcting reloading. Background technique [0002] Space is filled with all kinds of particles, including protons, electrons, particles, heavy ions, and more. These particles come from various sources, including the earth's capture belt, galactic cosmic rays, solar cosmic rays, etc., and generally have a very strong penetrating ability, and it is difficult to be completely shielded. Logic devices are affected by radiation effects caused by these particles, the most important of which is the single event effect. The radiation effects caused by these particles, especially the Single Event Effect (SEE, Single Event Effect) affect the reliability of space electronic instruments. [0003] The single event effect means that when a particle with su...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/413
Inventor 郭攀张朝杰陆光威金仲和
Owner ZHEJIANG UNIV
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