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Semiconductor device and fabrication method for semiconductor device

一种制造方法、半导体的技术，应用在半导体/固态器件制造、半导体器件、半导体/固态器件零部件等方向，能够解决Si芯片机械加工困难、可靠性影响等问题

Active Publication Date: 2014-08-27
MITSUBISHI ELECTRIC CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It is difficult to machine the backside (mounting surface) of a fragile Si chip with a thickness of 100 μm, and even if it can be machined, machining deformation will affect reliability

Method used

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  • Semiconductor device and fabrication method for semiconductor device
  • Semiconductor device and fabrication method for semiconductor device
  • Semiconductor device and fabrication method for semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach 1

[0032] figure 1 In , the overall structure of the semiconductor device 100 called T-PM (transmission power module) is shown. The semiconductor device 100 is composed of a lead frame 4 , power elements 11 , bonding wires 12 , control elements 13 , external leads 14 , molding resin 15 , heat sink 16 , and the like. The lead frame 4 , the power element 11 , the bonding wire 12 , the control element 13 , and the heat sink 16 are sealed with a molding resin 15 . The packaged semiconductor device 100 is formed by placing a bonded lead frame in a metal mold and pouring a thermosetting resin.

[0033] use Figure 2 ~ Figure 11 , the bonding process for bonding semiconductor elements such as the power element 11 to the lead frame 4 will be described. The power element 11 and the control element 13 may be formed of not only silicon (Si), but also a wide bandgap semiconductor having a wider bandgap than silicon. Examples of wide bandgap semiconductors include silicon carbide (SiC), g...

Embodiment approach 2

[0046] Figure 6 and Figure 7 It is a schematic diagram which shows the die-bonding process of the semiconductor element of Embodiment 2. In Embodiment 2, such as Figure 6 As shown, an aluminum jig 9 having quadrangular pyramid-shaped openings 91 and 92 is used. The openings 91 and 92 are filled with solder paste of high-temperature solder, and the Si chip 1 is placed on the aluminum mold 9 with the metal plating layer 2 facing down. The high-temperature solder paste filled in the openings 91 and 92 is melted, and the high-temperature solder is transferred to the metal plating layer 2 . Next, solder paste of low-temperature solder was printed and supplied onto the lead frame 4 using a printing mask (opening: 5 mm×5 mm, thickness: 0.3 mm), and the Si chip 1 was placed on the lead frame 4 with the convex bonding layers 31 and 32 facing down. lead frame 4 on.

[0047] Finally, the solder paste 5 of low-temperature solder is melted with a hot plate heated to 240° to form a ...

Embodiment approach 3

[0050] Figure 8 and Figure 9 It is a schematic diagram which shows the die-bonding process of the semiconductor element of Embodiment 3. In Embodiment 3, such as Figure 8 As shown, an aluminum mold 9 was used. This aluminum mold 9 has an opening in which a quadrangular pyramid-shaped opening 91 and an opening 92 are connected. The openings 91 and 92 are filled with solder paste of high-temperature solder, and the Si chip 1 is placed on the aluminum mold 9 with the metal plating layer 2 facing down. The high-temperature solder paste filled in the openings 91 and 92 is melted, and the high-temperature solder is transferred to the metal plating layer 2 . Next, solder paste for supplying low-temperature solder was printed using a printing mask (opening: 5 mm×5 mm, thickness: 0.3 mm), and Si chip 1 was mounted on lead frame 4 with convex bonding layers 31 and 32 facing down.

[0051] Finally, use a hot plate heated to 240°C to melt the solder paste of low-temperature solder...

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Abstract

The invention is to increase the reliability of die bonding in semiconductor devices. A semiconductor device provided with the following: a semiconductor element having a metalized layer on the back side thereof; a metal lead frame disposed so as to be parallel with the semiconductor element with a gap therebetween; a first bonding layer formed between the semiconductor element and the lead frame and bonded with the metallized layer; and a second bonding layer formed between the semiconductor element and the lead frame and bonding the first bonding layer and the lead frame. The center part of the first bonding layer bulges out towards the lead frame.

Description

technical field [0001] The present invention relates to a semiconductor device characterized by chipping. Background technique [0002] Power modules are used in everything from power generation and transmission to efficient use and regeneration of energy. When manufacturing such a semiconductor device, first, a silicon wafer on which circuits are formed is finely diced to form Si chips (IC chips). This cut state is called a small piece. The die is secured to the lead frame at a predetermined location. This process is called bonding. [0003] Semiconductor components, including power modules, are increasingly miniaturized. As the heat generation density increases, the quality of the patch part (the presence or absence of gaps, unjoined parts) has a great influence on heat dissipation. In the future, in order to increase efficiency, it is necessary to consider the development of thinning IC chips. Since the semiconductor element itself is not easy to dissipate heat, it ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/52
CPCH01L2224/29078H01L2224/3207H01L2224/32245H01L2224/83825H01L24/32H01L23/49513H01L2224/2784H01L2224/83801H01L2224/29111H01L2224/83193H01L2224/29019H01L2224/83048H01L2224/27332H01L2224/92247H01L24/27H01L2224/291H01L2224/48137H01L2224/83385H01L2224/29076H01L24/83H01L24/29H01L2924/10253H01L2224/45144H01L2224/73265H01L21/52H01L2224/48139H01L2924/014H01L2924/01047H01L2924/00012H01L2924/00H01L2224/48247H01L2924/351H01L2924/181H01L2224/0603H01L2224/49111H01L2224/83194
Inventor 藤野纯司
Owner MITSUBISHI ELECTRIC CORP