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How the transistor is formed

A transistor and semiconductor technology, which is applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of complex formation process and unstable transistor performance, and achieve the effect of simplifying process steps.

Active Publication Date: 2017-08-25
SEMICON MFG INT (SHANGHAI) CORP
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Problems solved by technology

[0005] In the prior art, the "gate-last" process is usually used to form high-K metal gate transistors with thinner gate dielectric layers, and the "gate-front" process is used to form polysilicon gate transistors with thicker gate dielectric layers. The formation process is relatively complicated, and The performance of transistors formed by the "gate-last" process is not stable enough

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Embodiment Construction

[0033] As mentioned in the background art, the process steps of forming transistors with gate dielectric layers of different thicknesses in the prior art are relatively complicated, and the performance of the formed transistors is not stable enough.

[0034] The inventors found that in the current process of forming a high-K metal gate transistor with a thinner gate dielectric layer by using the gate-last process, the process of removing the dummy gate dielectric layer generally adopts a wet etching process, because the dummy gate The materials of the dielectric layer and the dielectric layer are relatively close, and the material density of the dummy gate dielectric layer is generally greater than that of the dielectric layer, so in the wet etching process, the etching rate of the dielectric layer will be greater than that of the dummy gate dielectric layer. In the process of removing the dummy gate dielectric layer by wet etching process, a large loss will be caused to the di...

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Abstract

The invention relates to a forming method of a transistor. The forming method of the transistor includes the following steps that: a semiconductor substrate is provided, wherein the semiconductor substrate includes a first region and a second region; a dummy gate dielectric material layer is formed on the surface of the semiconductor substrate, wherein the dummy gate dielectric material layer includes a first insulating material layer and a second insulating material layer; a dummy gate and a second gate are formed; the dummy gate dielectric material layer is etched with the dummy gate and the second gate adopted as a mask, so that a dummy gate dielectric layer and a second gate dielectric layer are formed; first source / drain areas are formed in the first region, and second source / drain areas are formed in the second region; a dielectric layer is formed on the surface of the semiconductor substrate, and the surface of the dielectric layer is flush with the surface of the dummy gate; and the second insulating material layer in the dummy gate dielectric material layer is removed through adopting a dry etching process, and the first insulating material layer in the dummy gate dielectric material layer is removed through adopting a wet etching process, and therefore, a groove can be formed; and a first gate structure is formed in the groove. With the forming method of the transistor adopted, steps can be decreased, and the performance of the transistor can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a transistor. Background technique [0002] With the continuous improvement of the integration level of semiconductor devices and the reduction of technology nodes, the traditional gate dielectric layer continues to become thinner, and the leakage of transistors increases accordingly, causing problems such as waste of power consumption of semiconductor devices. In order to solve the above problems, the prior art provides a solution of replacing the polysilicon gate with a metal gate. Among them, the "gate last" process is a main process for forming high-K metal gate transistors. [0003] The existing method for forming a high-K metal gate transistor using a gate-last process includes: providing a semiconductor substrate on which a dummy gate structure is formed and located on the semiconductor substrate and covering the dummy gate structure The diele...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336
CPCH01L21/28158H01L21/823857H01L29/401H01L29/66545
Inventor 谢欣云洪中山
Owner SEMICON MFG INT (SHANGHAI) CORP
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