Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

PN-structured gate demodulation pixel

A technology for demodulating pixels and gate layers, which is applied in the field of demodulating pixels with PN structure gates, and can solve the problems of being unable to be controlled, not causing perfect constant gradients, and being inflexible.

Active Publication Date: 2015-01-21
HEPTAGON MICRO OPTICS
View PDF7 Cites 5 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] All PPD-based approaches share a common drawback: their overall inflexibility in drift voltage control compared to gate-based approaches, since the pinning voltage is predetermined by the doping concentration and cannot be obtained from an external source. controlled
The discretization of the potential gradient caused by the use of several gates always leads to a step function, but never to a perfectly constant gradient

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • PN-structured gate demodulation pixel
  • PN-structured gate demodulation pixel
  • PN-structured gate demodulation pixel

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0044] exist Figure 6 The basic idea of ​​the invention in combination with an arbitrary arrangement according to an implementation of the invention is shown in . In the particular illustrated example, a P-type substrate 12 is used. However, in other examples, an N-type substrate is used. Gate 22 is deposited and subsequently formed on substrate 12 and is electrically isolated from the substrate by insulating layer 112 .

[0045] The single gate 12 is configured with N-type and P-type regions 110-1 to 110-n, wherein the distance between these regions may vary from zero to several millimeters. By applying appropriate voltages to the N-type and / or P-type gate regions 110 - 1 to 110 - n , CCD-like voltage distribution control can be obtained, which enables CCD-like charge transport in the semiconductor bulk material 12 . Every region or only a few regions between the N-type and P-type doped regions are in some examples low concentration N-type or P-type doped or intrinsic reg...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A novel photo-sensitive element for electronic imaging purposes and, in this context, is particularly suited for time-of-flight 3D imaging sensor pixels. The element enables charge-domain photo-detection and processing based on a single gate architecture. Certain regions for n and p-doping implants of the gates are defined. This kind of single gate architecture enables low noise photon detection and high-speed charge transport methods at the same time. A strong benefit compared to known pixel structures is that no special processing steps are required such as overlapping gate structures or very high-ohmic poly-silicon deposition. In this sense, the element relaxes the processing methods so that this device may be integrated by the use of standard CMOS technology for example. Regarding time-of-flight pixel technology, a major challenge is the generation of lateral electric fields. The element allows the generation of fringing fields and large lateral electric fields.

Description

[0001] related application [0002] This application claims the benefit under 35 U.S.C. §119(e) of U.S. Provisional Patent Application 61 / 613,363, filed March 20, 2012, which is hereby incorporated by reference in its entirety. Background of the invention [0003] Generally, two different types of devices have been used in the past for light detection in the charge domain: The first type of device is the pinned photodiode (PPD) (see, e.g., Nobukazu Teranishi et al., “No image lag photodiode structure in the interline CCD image sensor (image-free photodiode structure in an interlaced CCD image sensor)", IEEE, 1982), which is available in today's complementary metal-oxide-semiconductor (CMOS) process technology; and the second type of device uses MOS Gate structures, which can be fabricated in CMOS technology or optimized Charge Coupled Device (CCD) technology. [0004] Pinned photodiodes typically have two implants in the substrate whose doping concentrations are chosen in suc...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/146
CPCH01L31/1804H01L27/14603H01L31/1125H01L27/14614H01L27/14643H01L29/4983
Inventor B·布艾特根M·莱曼B·凡艾罗
Owner HEPTAGON MICRO OPTICS
Features
  • Generate Ideas
  • Intellectual Property
  • Life Sciences
  • Materials
  • Tech Scout
Why Patsnap Eureka
  • Unparalleled Data Quality
  • Higher Quality Content
  • 60% Fewer Hallucinations
Social media
Patsnap Eureka Blog
Learn More