Method for optimizing two-layer embedded resistance layout by adopting fuzzy genetic algorithm

A technology of fuzzy genetic algorithm and embedded resistance, which is applied in calculation, genetic model, electrical digital data processing, etc., can solve the problems of population diversity reduction and population lack of alleles, etc.

Inactive Publication Date: 2015-02-04
GUILIN UNIV OF AEROSPACE TECH
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Problems solved by technology

However, due to the unique premature convergence phenomenon of the genetic algorithm, the population diversity decreases sharply in the early evolution...

Method used

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  • Method for optimizing two-layer embedded resistance layout by adopting fuzzy genetic algorithm
  • Method for optimizing two-layer embedded resistance layout by adopting fuzzy genetic algorithm
  • Method for optimizing two-layer embedded resistance layout by adopting fuzzy genetic algorithm

Examples

Experimental program
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Embodiment Construction

[0059] 18 embedded resistors with different powers and the same material and size are arranged in a two-layer layout inside the substrate, and each resistor is numbered from 1 to 18. The code represents both the position of each resistor and its power.

[0060] according to figure 1 The process shown is optimized.

[0061] Select a double-sided copper-clad PCB board with a length of 15cm, a width of 10cm, and a thickness of 2mm, and use a CNC machine tool to process grooves to form double-sided symmetrical grooves with a depth of 0.6mm on both sides of the PCB (single-sided Three grooves, a total of six grooves on both sides). The groove width of all grooves is 2mm, and the groove spacing is 5mm. Then according to the calculated layout arrangement, resistors with corresponding resistance values ​​are buried in the opened upper and lower grooves respectively, thus forming the upper and lower layers of embedded resistor layout. The embedded resistors are connected in series w...

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Abstract

The invention discloses a method for optimizing two-layer embedded resistance layout by adopting a fuzzy genetic algorithm. The method comprises the following steps: performing genetic operation on upper and lower layer resistance respectively; performing initial population generation, crossover, variation and evolution reversion operation in sequence; sharing crossover probability Pc and variation probability Pm output by a fuzzy logic controller; during calculation of a fitness function and local catastrophe, evaluating and updating by taking two populations as a whole; after population update, judging once again; if a certain condition is satisfied, performing local catastrophe on the populations. Compared with a method for performing thermal layout optimization by adopting a standard genetic algorithm, the method has the advantages that remarkable advantages are achieved on the aspects of keeping population variety and searching a globally optimal solution, and ANSYS temperature field distribution and the thermal imaging result of an experimental sample plate indicate that the maximum temperature and the maximum temperature difference are reduced greatly. A two-layer electronic element thermal layout rule obtained according to an optimization result is suitable for embedded resistance, and plays a guidance role in the thermal layout design of other electronic elements.

Description

technical field [0001] The invention relates to a resistance thermal layout, in particular to a method for optimizing a two-layer embedded resistance thermal layout by using a fuzzy genetic algorithm. Background technique [0002] With the development of electronic products towards light, thin, short and small, embedded passive device technology, which manufactures or embeds passive devices in the inner layer of the interconnection substrate to achieve high-density integration of components, has attracted extensive attention. This technology can effectively reduce the area of ​​the substrate, increase the wiring density and reduce the production cost. The shortening of the signal transmission path enables the embedded device to maintain signal integrity and reduce electromagnetic interference in the high-frequency and high-speed field. However, the improvement of component integration increases the power consumption per unit volume and the heat generation in the substrate a...

Claims

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Application Information

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IPC IPC(8): G06F17/50G06N3/12
Inventor 邓莉李天明黄春跃张瑞宾庞前娟黄伟
Owner GUILIN UNIV OF AEROSPACE TECH
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