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Method of Optimizing Two-Layer Embedded Resistor Layout Using Fuzzy Genetic Algorithm

A technology of fuzzy genetic algorithm and embedded resistance, which is applied in calculation, genetic model, electrical digital data processing, etc., can solve the problems of lack of alleles in the population, reduction of population diversity, etc.

Inactive Publication Date: 2017-11-07
GUILIN UNIV OF AEROSPACE TECH
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  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the unique premature convergence phenomenon of the genetic algorithm, the population diversity decreases sharply in the early evolutionary period, and the population lacks effective alleles, so the high-order competition pattern is no longer generated under the action of genetic operators[4]

Method used

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  • Method of Optimizing Two-Layer Embedded Resistor Layout Using Fuzzy Genetic Algorithm
  • Method of Optimizing Two-Layer Embedded Resistor Layout Using Fuzzy Genetic Algorithm
  • Method of Optimizing Two-Layer Embedded Resistor Layout Using Fuzzy Genetic Algorithm

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Experimental program
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Embodiment Construction

[0066] 18 embedded resistors with different powers and the same material and size are arranged in a two-layer layout inside the substrate, and each resistor is numbered from 1 to 18. The code represents both the position of each resistor and its power.

[0067] according to figure 1 The process shown is optimized.

[0068] Select a double-sided copper-clad PCB board with a length of 15cm, a width of 10cm, and a thickness of 2mm, and use a CNC machine tool to process grooves to form double-sided symmetrical grooves with a depth of 0.6mm on both sides of the PCB (single-sided Three grooves, a total of six grooves on both sides). The groove width of all grooves is 2mm, and the groove spacing is 5mm. Then according to the calculated layout arrangement, resistors with corresponding resistance values ​​are buried in the opened upper and lower grooves respectively, thus forming the upper and lower layers of embedded resistor layout. The embedded resistors are connected in series w...

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Abstract

The method for optimizing the layout of two-layer embedded resistors using fuzzy genetic algorithm of the present invention includes: respectively implementing genetic operations on the upper and lower layer resistors, sequentially performing initial population generation, crossover, mutation and evolutionary reversal operations, and sharing the output of the fuzzy logic controller Crossover probability Pc and mutation probability Pm, when calculating the fitness function and local catastrophe, evaluate and update the two populations as a whole, re-judgment after the population is updated, and implement local catastrophe on the population if the conditions are met. Compared with the method of thermal layout optimization using standard genetic algorithm, the present invention has obvious advantages in maintaining population diversity and searching for the global optimal solution, and the temperature field distribution of ANSYS and the thermal imaging results of the experimental model show that its maximum temperature and maximum The temperature difference has been greatly reduced. The thermal layout rules of two-layer electronic components obtained according to the optimization results are not only applicable to embedded resistors, but also have a guiding effect on the thermal layout design of other electronic components.

Description

technical field [0001] The invention relates to a resistance thermal layout, in particular to a method for optimizing a two-layer embedded resistance thermal layout by using a fuzzy genetic algorithm. Background technique [0002] With the development of electronic products towards light, thin, short and small, embedded passive device technology, which manufactures or embeds passive devices in the inner layer of the interconnection substrate to achieve high-density integration of components, has attracted extensive attention. This technology can effectively reduce the area of ​​the substrate, increase the wiring density and reduce the production cost. The shortening of the signal transmission path enables the embedded device to maintain signal integrity and reduce electromagnetic interference in the high-frequency and high-speed field. However, the improvement of component integration increases the power consumption per unit volume and the heat generation in the substrate a...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50G06N3/12
Inventor 邓莉李天明黄春跃张瑞宾庞前娟黄伟
Owner GUILIN UNIV OF AEROSPACE TECH