Tunneling field effect transistor and forming method thereof

Abstract

A tunneling field effect transistor and a forming method thereof are provided. The tunneling field effect transistor comprises a semiconductor substrate including a fin, a gate structure across the middle of the fin, a source across one end of the fin, and a drain disposed at the other end of the fin, wherein the conductivity type of the drain is a first conductivity type, and the conductivity type of the source is a second conductivity type different from the first conductivity type. The PN junction tunneling area of the tunneling field effect transistor provided by the invention is large, the working current of the tunneling field effect transistor is high, and the response speed of a device including the tunneling field effect transistor is increased.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a tunnel field effect transistor and a forming method thereof. Background technique [0002] Metal-Oxide-Semiconductor (MOS) technology has been widely used. For example, Complementary Metal Oxide Semiconductor (CMOS) transistors have become core components in semiconductor integrated circuits. In order to continuously improve the performance and packaging density of integrated circuits, and to reduce the cost of integrated circuits, the feature size of CMOS transistors is continuously reduced. [0003] However, as the dimensions of CMOS transistors continue to shrink, the overall power consumption of CMOS transistors continues to increase. The reasons are as follows: 1. The short channel effect becomes more and more obvious (such as the leakage current increases); 2. It is difficult to make the power supply voltage continue to decrease as the size of the CMO...

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Problems solved by technology

However, the existing tunneling field effect transistors have low operating current and poor driving ability

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