A kind of preparation method for the copper substrate of vertical structure led chip

An LED chip, vertical structure technology, applied in electrical components, circuits, semiconductor devices, etc., can solve the problems of high cost, complicated preliminary preparation, hindering the industrialization of vertical structure LED development, etc., to improve the yield and overcome a large number of copper adhesion. , the effect of low cost of preparation

Active Publication Date: 2017-06-30
广州市众拓光电科技有限公司
View PDF2 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, bonding copper has very strict requirements on experimental conditions, such as temperature and pressure, and requires a metal transition layer for bonding. It faces problems such as complicated preparations and high costs, which largely hinder the industrialization of vertical structure LEDs.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A kind of preparation method for the copper substrate of vertical structure led chip
  • A kind of preparation method for the copper substrate of vertical structure led chip
  • A kind of preparation method for the copper substrate of vertical structure led chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] The method for preparing a copper substrate for a vertical LED chip of this embodiment includes the following steps:

[0037] The method for preparing a copper substrate for a vertical structure LED chip is characterized in that it comprises the following steps:

[0038] 1) A layer of P-type metal electrode layer is vapor-deposited on the surface of the GaN epitaxial wafer, the metal in the P-type metal electrode layer is Cr or Pt, and another layer is plated on the P-type metal electrode layer by photolithography or evaporation technology. Layer Au to obtain a first substrate; the thickness of the Cr or Pt is both 30-50 nm, and the thickness of the Au is 800-1000 nm.

[0039] 2) Clean the first substrate, and after the degreasing effect is achieved, use 10% H 2 SO 4 Carry out surface activation for 1 min; the specific cleaning process is 1.5, 1.5, and 1 min cleaning with acetone, ethanol, and deionized water, respectively.

[0040] 3) Blackening the phosphorous copper anode co...

Embodiment 2

[0051] The method for preparing a copper substrate for a vertical LED chip according to this embodiment includes the following steps:

[0052] 1) A layer of P-type metal electrode layer is vapor-deposited on the surface of the GaN epitaxial wafer, and the metal in the P-type metal electrode layer is Cr or Pt, and another layer is plated on the P-type metal electrode layer by photolithography or vapor deposition technology. Layer Au to obtain a first substrate; the thickness of the Cr or Pt is 30 nm, and the thickness of the Au is 1000 nm.

[0053] 2) Clean the first substrate, and after the degreasing effect is achieved, use 10% H 2 SO 4 Perform surface activation for 1 min; the specific cleaning process is 1.5, 1.5, and 1 min with acetone, ethanol, and deionized water, respectively.

[0054] 3) Blackening the phosphorous copper anode containing 0.04wt% phosphorous for 3h and then cleaning; the cleaning solution used in the cleaning process is changed from the molar ratio of 1:5 (NH ...

Embodiment 3

[0062] The method for preparing a copper substrate for a vertical LED chip according to this embodiment includes the following steps:

[0063] 1) A layer of P-type metal electrode layer is vapor-deposited on the surface of the GaN epitaxial wafer, and the metal in the P-type metal electrode layer is Cr or Pt, and another layer is plated on the P-type metal electrode layer by photolithography or vapor deposition technology. Layer Au to obtain a first substrate; the thickness of the Cr or Pt is both 50 nm, and the thickness of the Au is 900 nm.

[0064] 2) Clean the first substrate, and after the degreasing effect is achieved, use 10% H 2 SO 4 Perform surface activation for 1 min; the specific cleaning process is 1.5, 1.5, and 1 min with acetone, ethanol, and deionized water, respectively.

[0065] 3) Blackening the phosphorous copper anode containing 0.065wt% phosphorous for 5h, and then cleaning; the cleaning solution used in the cleaning process is changed from the molar ratio of 1:...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
thicknessaaaaaaaaaa
Login to view more

Abstract

The invention provides a preparation method for a copper substrate for vertical LED (light-emitting diode) chips, which includes the following steps: (1) a P-type metal electrode layer is deposited on the surface of an epitaxial wafer, a layer of Au is then plated on the P-type metal electrode layer, and thereby a first substrate is obtained; (2) the first substrate is cleaned, and after a degreasing effect is achieved, H2SO4 is used for surface activation; (3) a phosphorized copper anode is blackened, and is then cleaned; (4) the first substrate treated in step 2 and the phosphorized copper anode treated in step 3 are put into copper plating solution and electroplated, so that an electroplated sample is obtained; (5) the electroplated sample is cleaned in order to remove residual copper plating solution, so that the copper substrate is obtained. The preparation method has the characteristics of simple process and low preparation cost, moreover, the copper substrate prepared by the method has the characteristics of no burrs, good surface uniformity, good smoothness, low roughness and good thermal and electric conductivities, and thereby a chip which is prepared by adopting the copper substrate has high light extraction efficiency.

Description

Technical field [0001] The invention relates to a method for preparing a copper substrate, in particular to a method for preparing a copper substrate for a vertical structure LED chip. Background technique [0002] As a new type of solid-state lighting source and green light source, light-emitting diodes (LED) have outstanding features such as small size, low power consumption, environmental protection, long service life, high brightness, low heat, and colorfulness. They are used in outdoor lighting, commercial lighting and decoration Engineering and other fields have a wide range of applications. In the field of lighting, the application of LED lighting products is attracting the attention of the world. [0003] At present, Si substrate LED chips have been gradually industrialized. However, because the Si substrate itself absorbs light up to 90%, it greatly reduces the light extraction efficiency of the LED chip. At the same time, the thermal conductivity of the Si substrate is ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): H01L33/62C25D3/38C25D5/54
CPCC25D3/38C25D5/54H01L33/62H01L33/647
Inventor 李国强
Owner 广州市众拓光电科技有限公司
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap